74ALVC74PW,112 datasheet, PDF - EEWORLD Datasheet

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74ALVC74PW,112: DescriptionIC FF D-TYPE DUAL 1BIT 14TSSOP; Categorylogic logic; File Size211KB，18 Pages; ManufacturerNexperia; Websitehttps://www.nexperia.com; Environmental Compliance

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74ALVC74PW,112 Overview

IC FF D-TYPE DUAL 1BIT 14TSSOP

74ALVC74PW,112 Parametric

Parameter Name	Attribute value
Brand Name	Nexperia
Is it Rohs certified?	conform to
Maker	Nexperia
Parts packaging code	TSSOP
package instruction	TSSOP-14
Contacts	14
Manufacturer packaging code	SOT402-1
Reach Compliance Code	compliant
Samacsys Confidence	2
Samacsys Status	Released
Samacsys PartID	683515
Samacsys Pin Count	14
Samacsys Part Category	Integrated Circuit
Samacsys Package Category	Small Outline Packages
Samacsys Footprint Name	SOT402-1
Samacsys Released Date	2019-11-12 07:41:52
Is Samacsys	N
series	ALVC/VCX/A
JESD-30 code	R-PDSO-G14
JESD-609 code	e4
length	5 mm
Logic integrated circuit type	D FLIP-FLOP
Humidity sensitivity level	1
Number of digits	1
Number of functions	2
Number of terminals	14
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output polarity	COMPLEMENTARY
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260
propagation delay (tpd)	6.2 ns
Certification status	Not Qualified
Maximum seat height	1.1 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	1.65 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
Trigger type	POSITIVE EDGE
width	4.4 mm
minfmax	300 MHz
Base Number Matches	1

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74ALVC74

Dual D-type flip-flop with set and reset; positive-edge trigger

Rev. 4 — 16 August 2017

Product data sheet

General description

The 74ALVC74 is a dual positive edge triggered, D-type flip-flop. It has individual data

(nD) inputs, clock (nCP) inputs, set (nSD) and (nRD) inputs, and complementary nQ and

nQ outputs.

The set and reset are asynchronous active LOW inputs that operate independently

of the clock input. Information on the data input is transferred to the nQ output on the

LOW-to-HIGH transition of the clock pulse. The nD inputs must be stable one set-up

time prior to the LOW-to-HIGH clock transition, for predictable operation. Schmitt-trigger

action in the clock input makes the circuit highly tolerant to slower clock rise and fall

times.

Features and benefits

•

Wide supply voltage range from 1.65 V to 3.6 V

•

Complies with JEDEC standard:

–

JESD8-7 (1.65 to 1.95 V)

–

JESD8-5 (2.3 to 2.7 V)

–

JESD8B/JESD36 (2.7 to 3.6 V)

•

3.6 V tolerant inputs/outputs

•

CMOS low power consumption

•

Direct interface with TTL levels (2.7 V to 3.6 V)

•

Power-down mode

•

Latch-up performance exceeds 250 mA

•

ESD protection:

–

HBM JESD22-A114-A exceeds 2000 V

–

MM JESD22-A115-A exceeds 200 V

•

Specified from -40 °C to +85 °C

74ALVC74PW,112 Related Products

	74ALVC74PW,112	74ALVC74PW,118	74ALVC74D,112	74ALVC74BQ,115	74ALVC74D,118
Description	IC FF D-TYPE DUAL 1BIT 14TSSOP	IC FF D-TYPE DUAL 1BIT 14TSSOP	IC FF D-TYPE DUAL 1BIT 14SO	IC FF D-TYPE DUAL 1BIT 14DHVQFN	IC FF D-TYPE DUAL 1BIT 14SO
Brand Name	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia
Maker	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia
Parts packaging code	TSSOP	TSSOP	SOIC	QFN	SOIC
package instruction	TSSOP-14	TSSOP-14	SOP-14	HVQCCN,	SOP-14
Contacts	14	14	14	14	14
Manufacturer packaging code	SOT402-1	SOT402-1	SOT108-1	SOT762-1	SOT108-1
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant
Samacsys Confidence	2	2	2	2	2
Samacsys Status	Released	Released	Released	Released	Released
Samacsys PartID	683515	683518	683514	683516	683517
Samacsys Pin Count	14	14	14	15	14
Samacsys Part Category	Integrated Circuit	Integrated Circuit	Integrated Circuit	Integrated Circuit	Integrated Circuit
Samacsys Package Category	Small Outline Packages	Small Outline Packages	Small Outline Packages	Quad Flat No-Lead	Small Outline Packages
Samacsys Footprint Name	SOT402-1	SOT402-1	SO14	DHVQFN14	SO14
Samacsys Released Date	2019-11-12 07:41:52	2019-11-12 07:41:52	2019-11-12 07:41:52	2019-11-12 07:41:52	2019-11-12 07:41:52
Is Samacsys	N	N	N	N	N
series	ALVC/VCX/A	ALVC/VCX/A	ALVC/VCX/A	ALVC/VCX/A	ALVC/VCX/A
JESD-30 code	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14	R-PQCC-N14	R-PDSO-G14
JESD-609 code	e4	e4	e4	e4	e4
length	5 mm	5 mm	8.65 mm	3 mm	8.65 mm
Logic integrated circuit type	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP
Humidity sensitivity level	1	1	1	1	1
Number of digits	1	1	1	1	1
Number of functions	2	2	2	2	2
Number of terminals	14	14	14	14	14
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Output polarity	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSSOP	TSSOP	SOP	HVQCCN	SOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260	260	260	260	260
propagation delay (tpd)	6.2 ns	6.2 ns	6.2 ns	6.2 ns	6.2 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.1 mm	1.1 mm	1.75 mm	1 mm	1.75 mm
Maximum supply voltage (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	1.65 V	1.65 V	1.65 V	1.65 V	1.65 V
Nominal supply voltage (Vsup)	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V
surface mount	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING	GULL WING	GULL WING	NO LEAD	GULL WING
Terminal pitch	0.65 mm	0.65 mm	1.27 mm	0.5 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL	QUAD	DUAL
Maximum time at peak reflow temperature	30	30	30	30	30
Trigger type	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE
width	4.4 mm	4.4 mm	3.9 mm	2.5 mm	3.9 mm
minfmax	300 MHz	300 MHz	300 MHz	300 MHz	300 MHz
Base Number Matches	1	1	1	1	1
Is it Rohs certified?	conform to	conform to	conform to	-	conform to

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