xr
AUGUST 2005
XR17C158
5V PCI BUS OCTAL UART
REV. 1.4.3
GENERAL DESCRIPTION
The XR17C158
1
(158) is an octal Universal
Asynchronous Receiver and Transmitter (UART). The
device is designed to meet the 32-bit PCI Bus and
high bandwidth requirement in communication
systems. The global interrupt source register
provides a complete interrupt status indication for all
8 channels to speed up interrupt parsing. Each UART
has its own 16C550 compatible set of configuration
registers, transmit and receive FIFOs of 64 bytes,
fully programmable transmit and receive FIFO level
triggers, transmit and receive FIFO level counters,
automatic RTS/CTS or DTR/DSR hardware flow
control with programmable hysteresis, automatic
software (Xon/Xoff) flow control, IrDA (Infrared Data
Association) encoder/decoder, 8 multi-purpose
definable inputs/outputs, and a 16-bit general
purpose timer/counter.
N
OTE
:
1 Covered by U.S. Patents #5,649,122 and #5,949,787
FEATURES
•
High Performance Octal UART
•
32-bit PCI Bus Interface with EEPROM Interface
•
Interrupt Source Register for all 8 UARTs
•
Data Transfer in Byte, Word and Double-word
•
Read/Write Burst Operation
•
Each UART Includes
•
16C550 Compatible Registers
•
64-byte Transmit and Receive FIFOs
•
Transmit and Receive FIFO Level Counters
•
Automatic RTS/CTS or DTR/DSR Flow Control
•
Automatic Xon/Xoff Software Flow Control
•
RS485 Half-duplex Control with Selectable Delay
•
Infrared (IrDA 1.0) Data Encoder/Decoder
•
Programmable Data Rate with Prescaler
•
Up to 6.25 Mbps Serial Data Rate
•
Eight Multi-Purpose Inputs/outputs
•
A General Purpose 16-bit Timer/Counter
•
Sleep Mode with Automatic Wake-up
•
5V Operation (PCI Compliance)
•
Same package and pinout as the XR17C154,
XR17D154 and XR17D158
•
144-pin LQFP Package (20x20x1.4mm)
APPLICATIONS
•
Remote Access Servers
•
Ethernet Network to Serial Ports
•
Network Management
•
Factory Automation and Process Control
•
Point-of-Sale Systems
•
Multi-port RS-232/RS-422/RS-485 Cards
F
IGURE
1. B
LOCK
D
IAGRAM
CLK
RST#
AD[31:0]
C/BE[3:0]#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
INTA#
IDSEL
PERR#
SERR#
PAR
UART Channel 0
UART
Regs
BRG
64 Byte TX FIFO
TX & RX
IR
ENDEC
64 Byte RX FIFO
TX0, RX0, DTR0#,
DSR0#, RTS0#,
CTS0#, CD0#, RI0#
UART Channel 1
PCI Local
Bus
Interface
Device
Configuration
Registers
UART Channel 2
UART Channel 3
UART Channel 4
UART Channel 5
Configuration
Space
Registers
UART Channel 6
UART Channel 7
TX7, RX7, DTR7#,
DSR7#, RTS7#,
CTS7#, CD7#, RI7#
MPIO0- MPIO7
XTAL1
XTAL2
TMRCK
EECK
EEDI
EEDO
EECS
EEPROM
Interface
16-bit
Timer/Counter
Multi-purpose
.
Inputs/Outputs
Crystal Osc/Buffer
Exar
Corporation 48720 Kato Road, Fremont CA, 94538
•
(510) 668-7000
•
FAX (510) 668-7017
•
www.exar.com
XR17C158
5V PCI BUS OCTAL UART
F
IGURE
2. P
IN
O
UT OF THE
D
EVICE
101 DSR2#
DSR3#
DSR4#
DSR5#
DTR3#
DTR2#
DTR4#
xr
REV. 1.4.3
MPIO0
107 MPIO1
104 RTS2#
100 CTS2#
RTS3#
CTS3#
CTS4#
79 DTR5#
RTS5#
86 RTS4#
103 RI2#
91 RX3
99
98
97
96
95
94
93
92
90
89
88
87
85
84
83
82
81
108
106
105
102
80
78
77
76
75
74
MPIO2
CD2#
CD3#
CD4#
CD5#
RI3#
RI4#
RI5#
RX2
RX4
TX2
TX3
TX4
XTAL2
XTAL1
TEST#
VCC
EEDO
EEDI
EECS
EECK
TX1
109
110
111
112
113
114
115
116
117
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
MPIO3
GND
VCC
TX5
CTS5#
RX5
ENIR
TMRCK
MPIO4
MPIO5
MPIO6
MPIO7
VCC
GND
TX6
DTR6#
RTS6#
RI6#
CD6#
DSR6#
CTS6#
RX6
TX7
DTR7#
RTS7#
RI7#
CD7#
DSR7#
CTS7#
RX7
GND
VCC
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
DTR1# 118
RTS1# 119
RI1#
CD1#
120
121
DSR1# 122
CTS1# 123
RX1
TX0
124
125
DTR0# 126
RTS0# 127
RI0#
CD0#
128
129
XR17C158
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
31
27
32
35
GND
33
DSR0# 130
CTS0# 131
RX0
INTA#
RST#
CLK
GND
VCC
AD31
AD30
AD29
AD28
AD27
AD26
AD25
132
133
134
135
136
137
138
139
140
141
142
143
144
11
12
17
DEVSEL# 18
19
20
STOP
21
#
PERR# 22
24
CBE1 25
28
29
SERR# 23
10
13
CBE2 14
FRAME# 15
IRDY# 16
26
30
34
36
CBE0
1
2
4
3
5
6
7
8
9
IDSEL
TRDY#
CBE3
AD24
AD23
GND
AD17
AD22
AD20
AD19
AD16
AD21
AD18
AD15
AD14
AD13
AD12
AD11
AD10
VCC
GND
VCC
PAR
AD9
ORDERING INFORMATION
P
ART
N
UMBER
XR17C158CV
XR17C158IV
P
ACKAGE
144-Lead LQFP
144-Lead LQFP
O
PERATING
T
EMPERATURE
R
ANGE
0°C to +70°C
-40°C to +85°C
D
EVICE
S
TATUS
Active
Active
2
AD8
VCC
xr
REV. 1.4.3
XR17C158
5V PCI BUS OCTAL UART
PIN DESCRIPTIONS
Pin Description
N
AME
RST#
P
IN
#
134
T
YPE
I
D
ESCRIPTION
Bus reset input (active low). It resets the PCI local bus configuration space
registers, device configuration registers and UART channel registers to the
default condition, see
Table 19.
Bus clock input of up to 33.34MHz at 5V.
Address data lines [31:0] (bidirectional).
PCI LOCAL BUS INTERFACE
CLK
AD31-AD25,
AD24,
AD23-AD16,
AD15-AD8,
AD7-AD0
FRAME#
C/BE0#-C/BE3#
IRDY#
135
138-144,
1,
6-13,
26-33,
37-44
15
36,25,14,2
16
I
IO
I
I
I
Bus transaction cycle frame (active low). It indicates the beginning and dura-
tion of an access.
Bus Command/Byte Enable [3:0] (active low). This line is multiplexed for bus
Command during the address phase and Byte Enables during the data phase.
Initiator Ready (active low). During a write, it indicates that valid data is
present on data bus. During a read, it indicates the master is ready to accept
data.
Target Ready (active low).
Target request to stop current transaction (active low).
Initialization device select (active high).
Device select to the XR17C158 (active low).
Device interrupt from XR17C158 (open drain, active low).
Parity is even across AD[31:0] and C/BE[3:0]# (bidirectional, active high).
Data Parity error indicator, except for Special Cycle transactions (active low).
Optional in bus target application.
System error indicator, Address parity or Data parity during Special Cycle
transactions (open drain, active low). Optional in bus target application.
UART channel 0 Transmit Data or infrared transmit data.
UART channel 0 Receive Data or infrared receive data. Normal RXD input
idles HIGH. The infrared pulses typically idle LOW but can be inverted inter-
nally prior the decoder by FCTR[4].
UART channel 0 Request to Send or general purpose output (active low).
UART channel 0 Clear to Send or general purpose input (active low).
UART channel 0 Data Terminal Ready or general purpose output (active low).
UART channel 0 Data Set Ready or general purpose input (active low).
UART channel 0 Carrier Detect or general purpose input (active low).
UART channel 0 Ring Indicator or general purpose input (active low).
UART channel 1 Transmit Data or infrared transmit data.
UART channel 1 Receive Data or infrared receive data. Normal RXD input
idles HIGH. The infrared pulses can be inverted internally prior the decoder by
FCTR[4].
UART channel 1 Request to Send or general purpose output (active low).
UART channel 1 Clear to Send or general purpose input (active low).
TRDY#
STOP#
IDSEL
DEVSEL#
INTA#
PAR
PERR#
SERR#
17
21
3
18
133
24
22
23
O
O
I
O
OD
IO
O
OD
MODEM OR SERIAL I/O INTERFACE
TX0
RX0
125
132
O
I
RTS0#
CTS0#
DTR0#
DSR0#
CD0#
RI0#
TX1
RX1
127
131
126
130
129
128
117
124
O
I
O
I
I
I
O
I
RTS1#
CTS1#
119
123
O
I
3
XR17C158
5V PCI BUS OCTAL UART
Pin Description
N
AME
DTR1#
DSR1#
CD1#
RI1#
TX2
RX2
P
IN
#
118
122
121
120
106
99
T
YPE
O
I
I
I
O
I
D
ESCRIPTION
xr
REV. 1.4.3
UART channel 1 Data Terminal Ready or general purpose output (active low).
UART channel 1 Data Set Ready or general purpose input (active low).
UART channel 1 Carrier Detect or general purpose input (active low).
UART channel 1 Ring Indicator or general purpose input (active low).
UART channel 2 Transmit Data or infrared transmit data.
UART channel 2 Receive Data or infrared receive data. Normal RXD input
idles HIGH. The infrared pulses typically idle LOW but can be inverted inter-
nally prior the decoder by FCTR[4].
UART channel 2 Request to Send or general purpose output (active low).
UART channel 2 Clear to Send or general purpose input (active low).
UART channel 2 Data Terminal Ready or general purpose output (active low).
UART channel 2 Data Set Ready or general purpose input (active low).
UART channel 2 Carrier Detect or general purpose input (active low).
UART channel 2 Ring Indicator or general purpose input (active low).
UART channel 3 Transmit Data or infrared transmit data.
UART channel 3 Receive Data or infrared receive data. Normal RXD input
idles HIGH. The infrared pulses typically idle LOW but can be inverted inter-
nally prior the decoder by FCTR[4].
UART channel 3 Request to Send or general purpose output (active low).
UART channel 3 Clear to Send or general purpose input (active low).
UART channel 3 Data Terminal Ready or general purpose output (active low).
UART channel 3 Data Set Ready or general purpose input (active low).
UART channel 3 Carrier Detect or general purpose input (active low).
UART channel 3 Ring Indicator or general purpose input (active low).
UART channel 4 Transmit Data or infrared transmit data.
UART channel 4 Receive Data or infrared receive data. Normal RXD input
idles HIGH. The infrared pulses typically idle LOW but can be inverted inter-
nally prior the decoder by FCTR[4].
UART channel 4 Request to Send or general purpose output (active low).
UART channel 4 Clear to Send or general purpose input (active low).
UART channel 4 Data Terminal Ready or general purpose output (active low).
UART channel 4 Data Set Ready or general purpose input (active low).
UART channel 4 Carrier Detect or general purpose input (active low).
UART channel 4 Ring Indicator or general purpose input (active low).
UART channel 5 Transmit Data or infrared transmit data.
UART channel 5 Receive Data or infrared receive data. Normal RXD input
idles HIGH. The infrared pulses typically idle LOW but can be inverted inter-
nally prior the decoder by FCTR[4].
UART channel 5 Request to Send or general purpose output (active low).
UART channel 5 Clear to Send or general purpose input (active low).
UART channel 5 Data Terminal Ready or general purpose output (active low).
UART channel 5 Data Set Ready or general purpose input (active low).
UART channel 5 Carrier Detect or general purpose input (active low).
UART channel 5 Ring Indicator or general purpose input (active low).
RTS2#
CTS2#
DTR2#
DSR2#
CD2#
RI2#
TX3
RX3
104
100
105
101
102
103
98
91
O
I
O
I
I
I
O
I
RTS3#
CTS3#
DTR3#
DSR3#
CD3#
RI3#
TX4
RX4
96
92
97
93
94
95
88
81
O
I
O
I
I
I
O
I
RTS4#
CTS4#
DTR4#
DSR4#
CD4#
RI4#
TX5
RX5
86
82
87
83
84
85
80
71
O
I
O
I
I
I
O
I
RTS5#
CTS5#
DTR5#
DSR5#
CD5#
RI5#
78
72
79
75
76
77
O
I
O
I
I
I
4
xr
REV. 1.4.3
XR17C158
5V PCI BUS OCTAL UART
Pin Description
N
AME
TX6
RX6
P
IN
#
62
55
T
YPE
O
I
D
ESCRIPTION
UART channel 6 Transmit Data or infrared transmit data.
UART channel 6 Receive Data or infrared receive data. Normal RXD input
idles HIGH. The infrared pulses typically idle LOW but can be inverted inter-
nally prior the decoder by FCTR[4].
UART channel 6 Request to Send or general purpose output (active low).
UART channel 6 Clear to Send or general purpose input (active low).
UART channel 6 Data Terminal Ready or general purpose output (active low).
UART channel 6 Data Set Ready or general purpose input (active low).
UART channel 6 Carrier Detect or general purpose input (active low).
UART channel 6 Ring Indicator or general purpose input (active low).
UART channel 7 Transmit Data or infrared transmit data.
UART channel 7 Receive Data or infrared receive data. Normal RXD input
idles HIGH. The infrared pulses typically idle LOW but can be inverted inter-
nally prior the decoder by FCTR[4].
UART channel 7 Request to Send or general purpose output (active low).
UART channel 7 Clear to Send or general purpose input (active low).
UART channel 7 Data Terminal Ready or general purpose output (active low).
UART channel 7 Data Set Ready or general purpose input (active low).
UART channel 7 Carrier Detect or general purpose input (active low).
UART channel 7 Ring Indicator or general purpose input (active low).
Multi-purpose input/output 0. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT
Multi-purpose input/output 1. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
Multi-purpose input/output 2. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
Multi-purpose input/output 3. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
Multi-purpose input/output 4. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
Multi-purpose input/output 5. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
Multi-purpose input/output 6. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
Multi-purpose input/output 7. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
Serial clock to EEPROM. An internal clock of CLK divide by 256 is used for
reading the vendor and sub-vendor ID during power up or reset. However, it
can be manually clocked thru the Configuration Register REGB.
RTS6#
CTS6#
DTR6#
DSR6#
CD6#
RI6#
TX7
RX7
60
56
61
57
58
59
54
47
O
I
O
I
I
I
O
I
RTS7#
CTS7#
DTR7#
DSR7#
CD7#
RI7#
ANCILLARY SIGNALS
MPIO0
MPIO1
MPIO2
MPIO3
MPIO4
MPIO5
MPIO6
MPIO7
EECK
52
48
53
49
50
51
108
107
74
73
68
67
66
65
116
O
I
O
I
I
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
5
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