This product has been retired and is not available for designs.
For new and current designs involving TSOP packages, S29JL064H supersedes Am29DL640D and is the factory-recommended migration path. Please refer to the S29JL064H datasheet
for specifications and ordering information.
For new and current designs involving Fine-pitch BGA (FBGA) packages, S29PL064J supersedes Am29DL640D and is the factory-recommended migration path. Please refer to the
S29PL064J Datasheet for specifications and ordering information.
Availability of this document is retained for reference and historical purposes only.
DISTINCTIVE CHARACTERISTICS
ARCHITECTURAL ADVANTAGES
Simultaneous Read/Write operations
— Data can be continuously read from one bank while
executing erase/program functions in another bank.
— Zero latency between read and write operations
Flexible Bank
TM
architecture
— Read may occur in any of the three banks not being
written or erased.
— Four banks may be grouped by customer to achieve
desired bank divisions.
Boot Sectors
— Top and bottom boot sectors in the same device
— Any combination of sectors can be erased
Manufactured on 0.23 µm process technology
Secured Silicon Sector: Extra 256 Byte sector
—
Factory locked and identifiable:
16 bytes available for
secure, random factory Electronic Serial Number;
verifiable as factory locked through autoselect
function. ExpressFlash option allows entire sector to
be available for factory-secured data
—
Customer lockable:
Can be read or programmed just
like other sectors. Once locked, data cannot be
changed
Zero Power Operation
— Sophisticated power management circuits reduce
power consumed during inactive periods to nearly
zero.
Compatible with JEDEC standards
— Pinout and software compatible with
single-power-supply flash standard
PACKAGE OPTIONS
63-ball Fine Pitch BGA
■
48-pin TSOP
PERFORMANCE CHARACTERISTICS
High performance
— Access time as fast as 90 ns
— Program time: 4 µs/word typical utilizing Accelerate
function
Ultra low power consumption (typical values)
— 2 mA active read current at 1 MHz
— 10 mA active read current at 5 MHz
— 200 nA in standby or automatic sleep mode
Minimum 1 million erase cycles guaranteed per
sector
20 year data retention at 125°C
— Reliable operation for the life of the system
SOFTWARE FEATURES
Data Management Software (DMS)
— AMD-supplied software manages data programming,
enabling EEPROM emulation
— Eases historical sector erase flash limitations
Supports Common Flash Memory Interface (CFI)
Program/Erase Suspend/Erase Resume
— Suspends program/erase operations to allow
programming/erasing in same bank
Data# Polling and Toggle Bits
— Provides a software method of detecting the status of
program or erase cycles
Unlock Bypass Program command
— Reduces overall programming time when issuing
multiple program command sequences
HARDWARE FEATURES
Ready/Busy# output (RY/BY#)
— Hardware method for detecting program or erase
cycle completion
Hardware reset pin (RESET#)
— Hardware method of resetting the internal state
machine to the read mode
WP#/ACC input pin
— Write protect (WP#) function protects sectors 0, 1,
140, and 141, regardless of sector protect status
— Acceleration (ACC) function accelerates program
timing
Sector protection
— Hardware method of locking a sector, either
in-system or using programming equipment, to
prevent any program or erase operation within that
sector
— Temporary Sector Unprotect allows changing data in
protected sectors in-system
Publication#
23695
Rev:
C
Amendment/3
Issue Date:
December 13, 2005
Refer to AMD’s Website (www.amd.com) for the latest information.
GENERAL DESCRIPTION
The Am29DL640D is a 64 megabit, 3.0 volt-only flash
memory device, organized as 4,194,304 words of 16
bits each or 8,388,608 bytes of 8 bits each. Word
mode data appears on DQ0–DQ15; byte mode data
appears on DQ0–DQ7. The device is designed to be
programmed in-system with the standard 3.0 volt V
CC
supply, and can also be programmed in standard
EPROM programmers.
The device is available with an access time of 90 or
120 ns and is offered in 48-pin TSOP and 63-ball
Fine-Pitch BGA. Standard control pins—chip enable
(CE#), write enable (WE#), and output enable
(OE#)—control normal read and write operations, and
avoid bus contention issues.
The device requires only a
single 3.0 volt power sup-
ply
for both read and write functions. Internally
generated and regulated voltages are provided for the
program and erase operations.
byte ESN (Electronic Serial Number), customer code
(programmed through AMD’s ExpressFlash service),
or both. Customer Lockable parts may utilize the Se-
cured Silicon Sector as bonus space, reading and
writing like any other flash sector, or may permanently
lock their own code there.
DMS (Data Management Software)
allows systems
to easily take advantage of the advanced architecture
of the simultaneous read/write product line by allowing
removal of EEPROM devices. DMS also allows the
system software to be simplified, as it performs all
functions necessary to modify data in file structures,
as opposed to single-byte modifications. To write or
update a particular piece of data (a phone number or
configuration data, for example), the user only needs
to state which piece of data is to be updated, and
where the updated data is located in the system. This
i s a n a d va n t a g e c o m p a r e d t o s y s t e m s w h e r e
user-written software must keep track of the old data
location, status, logical to physical translation of the
data onto the Flash memory device (or memory de-
vices), and more. Using DMS, user-written software
does not need to interface with the Flash memory di-
rectly. Instead, the user's software accesses the Flash
memory by calling one of only six functions. AMD pro-
vides this software to simplify system design and
software integration efforts.
The device offers complete compatibility with the
JEDEC single-power-supply Flash command set
standard.
Commands are written to the command
register using standard microprocessor write timings.
Reading data out of the device is similar to reading
from other Flash or EPROM devices.
The host system can detect whether a program or
erase operation is complete by using the device
sta-
tus bits:
RY/BY# pin, DQ7 (Data# Polling) and
DQ6/DQ2 (toggle bits). After a program or erase cycle
has been completed, the device automatically returns
to the read mode.
The
sector erase architecture
allows memory sec-
tors to be erased and reprogrammed without affecting
the data contents of other sectors. The device is fully
erased when shipped from the factory.
Hardware data protection
measures include a low
V
CC
detector that automatically inhibits write opera-
tions during power transitions. The
hardware sector
protection
feature disables both program and erase
operations in any combination of the sectors of mem-
o r y. T h i s c a n b e a c h i ev e d i n - s y s t e m o r v i a
programming equipment.
The device offers two power-saving features. When
addresses have been stable for a specified amount of
time, the device enters the
automatic sleep mode.
The system can also place the device into the
standby mode.
Power consumption is greatly re-
duced in both modes.
Simultaneous Read/Write Operations with
Zero Latency
The Simultaneous Read/Write architecture provides
simultaneous operation
by dividing the memory
space into
four banks,
two 8 Mb banks with small and
large sectors, and two 24 Mb banks of large sectors.
Sector addresses are fixed, system software can be
used to form user-defined bank groups.
During an Erase/Program operation, any of the three
non-busy banks may be read from. Note that only two
banks can operate simultaneously. The device can im-
prove overall system performance by allowing a host
system to program or erase in one bank, then
immediately and simultaneously read from the other
bank, with zero latency. This releases the system from
waiting for the completion of program or erase
operations.
The Am29DL640D can be organized as both a top and
bottom boot sector configuration.
Bank
Bank 1
Bank 2
Bank 3
Bank 4
Megabits
8 Mb
24 Mb
24 Mb
8 Mb
Sector Sizes
Eight 8 Kbyte/4 Kword,
Fifteen 64 Kbyte/32 Kword
Forty-eight 64 Kbyte/32 Kword
Forty-eight 64 Kbyte/32 Kword
Eight 8 Kbyte/4 Kword,
Fifteen 64 Kbyte/32 Kword
Am29DL640D Features
The
Secured Silicon Sector
is an extra 256 byte sec-
tor capable of being permanently locked by AMD or
customers. The
Secured Silicon Indicator Bit
(DQ7)
is permanently set to a 1 if the part is
factory locked,
and set to a 0 if
customer lockable.
This way, cus-
tomer lockable parts can never be used to replace a
factory locked part.
Factory locked parts provide several options. The Se-
cured Silicon Sector may store a secure, random 16
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Analogue and Mixed Signal
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