*See Application Note AND8308/D for detailed explanations of
datasheet parameters.
ELECTRICAL CHARACTERISTICS
(T
J
= 25°C, unless otherwise specified)
Parameter
Reverse Working Voltage (D
1
, D
2
, and D
3
)
Reverse Working Voltage (V
CC
)
Breakdown Voltage (D
1
, D
2
, and D
3
)
Breakdown Voltage (V
CC
)
Reverse Leakage Current (D
1
, D
2
, and D
3
)
Reverse Leakage Current (D
1
, D
2
, and D
3
)
Reverse Leakage Current (V
CC
)
Clamping Voltage (D
1
, D
2
, and D
3
)
Clamping Voltage (V
CC
)
Clamping Voltage (V
CC
)
Junction Capacitance (D
1
, D
2
, and D
3
)
Clamping Voltage
(Note 1)
(Note 1)
I
T
= 1 mA, (Note 2)
I
T
= 1 mA, (Note 2)
@ V
RWM1
@ 3.3 V
@ V
RWM2
I
PP
= 1 A
I
PP
= 1 A
I
PP
= 3 A
V
R
= 0 V, f = 1 MHz (Line to GND)
Per IEC 61000−4−2 (Note 4)
Conditions
Symbol
V
RWM1
V
RWM2
V
BR
V
BR2
I
R
I
R
I
R
V
C
V
C
V
C
C
J
VC
Min
−
−
6.0
15
−
−
−
−
−
−
−
Typ
−
−
6.8
16
−
−
−
9.4
18.5
22
0.8
Figure 1 and 2
Max
5.5
12
8.0
16.8
1.0
85
1.0
−
−
−
1.0
Unit
V
V
V
V
mA
nA
mA
V
V
V
pF
V
1. Surge protection devices are normally selected according to the working peak reverse voltage (V
RWM
), which should be equal or greater
than the DC or continuous peak operating voltage level.
2. V
BR
is measured at pulse test current I
T
.
3. Surge current waveform per Figure 5.
4. Typical waveform. For test procedure see Figures 3 and 4 and Application Note AND8307/D.
Figure 1. ESD Clamping Voltage Screenshot
Positive 8 kV Contact per IEC61000−4−2
Figure 2. ESD Clamping Voltage Screenshot
Negative 8 kV Contact per IEC61000−4−2
www.onsemi.com
2
NUP3115UPMU
IEC 61000−4−2 Spec.
Test Volt-
age (kV)
2
4
6
8
First Peak
Current
(A)
7.5
15
22.5
30
Current at
30 ns (A)
4
8
12
16
Current at
60 ns (A)
2
4
6
8
I @ 60 ns
10%
t
P
= 0.7 ns to 1 ns
I @ 30 ns
IEC61000−4−2 Waveform
I
peak
100%
90%
Level
1
2
3
4
Figure 3. IEC61000−4−2 Spec
Device
ESD Gun
Under
Test
Oscilloscope
50
W
Cable
50
W
Figure 4. Diagram of ESD Test Setup
The following is taken from Application Note
AND8308/D
−
Interpretation of Datasheet Parameters
for ESD Devices.
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC61000−4−2 waveform. Since the
IEC61000−4−2 was written as a pass/fail spec for larger
100
% OF PEAK PULSE CURRENT
90
80
70
60
50
40
30
20
10
0
0
20
t
P
t
r
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
PEAK VALUE I
RSM
@ 8
ms
PULSE WIDTH (t
P
) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8
ms
HALF VALUE I
RSM
/2 @ 20
ms
40
t, TIME (ms)
60
80
Figure 5. 8 x 20
ms
Pulse Waveform
www.onsemi.com
3
NUP3115UPMU
PACKAGE DIMENSIONS
UDFN6, 1.6 x 1.6, 0.5P
CASE 517AP−01
ISSUE O
D
2X
A
B
L1
E
DETAIL A
0.10 C
L
2X
0.10 C
DETAIL B
(A3)
A
A1
0.05 C
6X
0.05 C
SIDE VIEW
A1
C
SEATING
PLANE
DETAIL A
6X
L
D2
1
3
E2
6X
K
e
6
5
6X
b
0.10 C A B
0.05 C
NOTE 3
BOTTOM VIEW
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at
www.onsemi.com/site/pdf/Patent−Marking.pdf.
ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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For additional information, please contact your local
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◊
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4
ÉÉÉ
ÉÉÉ
ÉÉÉ
DETAIL B
ÉÉÉ
ÉÉÉ
PIN ONE
REFERENCE
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30 mm FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
DIM
A
A1
A3
b
D
E
e
D2
E2
K
L
L1
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.13 REF
0.20
0.30
1.60 BSC
1.60 BSC
0.50 BSC
1.10
1.30
0.45
0.65
0.20
−−−
0.20
0.40
0.00
0.15
OPTIONAL
CONSTRUCTION
EXPOSED Cu
MOLD CMPD
TOP VIEW
A3
OPTIONAL
CONSTRUCTION
SOLDERMASK DEFINED
MOUNTING FOOTPRINT*
1.26
0.52
6X
0.61 1.90
1
0.50 PITCH
6X
0.32
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
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