EP2C35U484C6 datasheet, PDF - EEWORLD Datasheet

EP2C35U484C6: DescriptionFPGA - Field Programmable Gate Array FPGA - Cyclone II 2076 LABs 322 IOs; CategoryProgrammable logic devices Programmable logic; File Size109KB，10 Pages; ManufacturerIntel; Websitehttp://www.intel.com/

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FPGA - Field Programmable Gate Array FPGA - Cyclone II 2076 LABs 322 IOs

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Intel
package instruction	UBGA-484
Reach Compliance Code	compliant
ECCN code	3A991
Other features	ALSO REQUIRES 3.3 SUPPLY
maximum clock frequency	500 MHz
JESD-30 code	S-PBGA-B484
JESD-609 code	e0
length	19 mm
Humidity sensitivity level	3
Configurable number of logic blocks	2076
Number of entries	322
Number of logical units	33216
Output times	306
Number of terminals	484
Maximum operating temperature	85 °C
Minimum operating temperature
organize	2076 CLBS
Package body material	PLASTIC/EPOXY
encapsulated code	FBGA
Encapsulate equivalent code	BGA484,22X22,40
Package shape	SQUARE
Package form	GRID ARRAY, FINE PITCH
Peak Reflow Temperature (Celsius)	220
power supply	1.2,1.5/3.3,3.3 V
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY
Certification status	Not Qualified
Maximum seat height	2.2 mm
Maximum supply voltage	1.25 V
Minimum supply voltage	1.15 V
Nominal supply voltage	1.2 V
surface mount	YES
technology	CMOS
Temperature level	OTHER
Terminal surface	TIN LEAD
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	30
width	19 mm

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