844256DGLFT datasheet, PDF - EEWORLD Datasheet

844256DGLFT: DescriptionClock Synthesizer / Jitter Cleaner FANOUT BUFFER; CategoryThe embedded processor and controller Microcontrollers and processors; File Size785KB，18 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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Clock Synthesizer / Jitter Cleaner FANOUT BUFFER

Parameter Name	Attribute value
Brand Name	Integrated Device Technology
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	IDT (Integrated Device Technology)
Parts packaging code	TSSOP
package instruction	HTSSOP, TSSOP24,.25
Contacts	24
Manufacturer packaging code	EJG24
Reach Compliance Code	compliant
ECCN code	EAR99
Samacsys Description	TSSOP 4.4 MM WITH EXPOSED PAD
JESD-30 code	R-PDSO-G24
JESD-609 code	e3
length	7.8 mm
Humidity sensitivity level	1
Number of terminals	24
Maximum operating temperature	70 °C
Minimum operating temperature
Maximum output clock frequency	625 MHz
Package body material	PLASTIC/EPOXY
encapsulated code	HTSSOP
Encapsulate equivalent code	TSSOP24,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, HEAT SINK/SLUG, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260
power supply	3.3 V
Master clock/crystal nominal frequency	25.5 MHz
Certification status	Not Qualified
Maximum seat height	1.1 mm
Maximum slew rate	172 mA
Maximum supply voltage	3.465 V
Minimum supply voltage	3.135 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Matte Tin (Sn)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	4.4 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER

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