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709159L9PF

Description
SRAM 8K X 9 DP SRAM
Categorystorage    storage   
File Size168KB,16 Pages
ManufacturerIDT (Integrated Device Technology)
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709159L9PF Overview

SRAM 8K X 9 DP SRAM

709159L9PF Parametric

Parameter NameAttribute value
Brand NameIntegrated Device Technology
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
Parts packaging codeTQFP
package instruction14 X 14 MM, 1.4 MM HEIGHT, TQFP-100
Contacts100
Manufacturer packaging codePN100
Reach Compliance Codenot_compliant
ECCN codeEAR99
Maximum access time9 ns
Other featuresFLOW-THROUGH OR PIPELINED ARCHITECTURE
Maximum clock frequency (fCLK)66 MHz
I/O typeCOMMON
JESD-30 codeS-PQFP-G100
JESD-609 codee0
length14 mm
memory density73728 bit
Memory IC TypeDUAL-PORT SRAM
memory width9
Humidity sensitivity level3
Number of functions1
Number of ports2
Number of terminals100
word count8192 words
character code8000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize8KX9
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeLFQFP
Encapsulate equivalent codeQFP100,.63SQ,20
Package shapeSQUARE
Package formFLATPACK, LOW PROFILE, FINE PITCH
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)240
power supply5 V
Certification statusNot Qualified
Maximum seat height1.4 mm
Maximum standby current0.003 A
Minimum standby current4.5 V
Maximum slew rate0.36 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperature20
width14 mm
Base Number Matches1
HIGH-SPEED 16/8K x 9
SYNCHRONOUS PIPELINED
DUAL-PORT STATIC RAM
Features
IDT709169/59L
True Dual-Ported memory cells which allow simultaneous
access of the same memory location
High-speed clock to data access
– Commercial: 6.5/7.5/9ns (max.)
Industrial: 7.5ns (max.)
Low-power operation
– IDT709169/59L
Active: 925mW (typ.)
Standby: 2.5mW (typ.)
Flow-Through or Pipelined output mode on either Port via
the
FT/PIPE
pins
Counter enable and reset features
Dual chip enables allow for depth expansion without
additional logic
Full synchronous operation on both ports
– 3.5ns setup to clock and 0ns hold on all control, data, and
address inputs
– Data input, address, and control registers
– Fast 6.5ns clock to data out in the Pipelined output mode
– Self-timed write allows fast cycle time
– 10ns cycle time,100MHz operation in Pipelined output mode
TTL- compatible, single 5V (±10%) power supply
Industrial temperature range (–40°C to +85°C) is
available for 83MHz
Available in a 100-pin Thin Quad Flatpack (TQFP) and 100-
pin fine pitch Ball Grid Array (fpBGA) packages.
Functional Block Diagram
R/W
L
OE
L
CE
0L
CE
1L
R/W
R
OE
R
CE
0R
CE
1R
1
0
0/1
1
0
0/1
FT/PIPE
L
0/1
1
0
0
1
0/1
FT/PIPE
R
I/O
0L
- I/O
8L
I/O
0R
- I/O
8R
I/O
Control
I/O
Control
A
13L(1)
A
0L
CLK
L
ADS
L
CNTEN
L
CNTRST
L
Counter/
Address
Reg.
MEMORY
ARRAY
Counter/
Address
Reg.
A
13R(1)
A
0R
CLK
R
ADS
R
CNTEN
R
CNTRST
R
5653 drw 01
NOTE:
1. A
13
is a NC for IDT709159.
JANUARY 2009
1
©2009 Integrated Device Technology, Inc.
DSC-5653/3

709159L9PF Related Products

709159L9PF 709159L9BF 709159L6BF
Description SRAM 8K X 9 DP SRAM SRAM 8K x 9 Sync, Dual-Port RAM, Pipelined/Flow-Through SRAM 8K x 9 Sync, Dual-Port RAM, Pipelined/Flow-Through
Brand Name Integrated Device Technology Integrated Device Technology Integrated Device Technology
Is it lead-free? Contains lead Contains lead Contains lead
Is it Rohs certified? incompatible incompatible incompatible
Parts packaging code TQFP CABGA CABGA
package instruction 14 X 14 MM, 1.4 MM HEIGHT, TQFP-100 10 X 10 MM, 1.4 MM HEIGHT, 0.8 MM PITCH, FBGA-100 10 X 10 MM, 1.4 MM HEIGHT, 0.8 MM PITCH, FBGA-100
Contacts 100 100 100
Manufacturer packaging code PN100 BF100 BF100
Reach Compliance Code not_compliant not_compliant not_compliant
ECCN code EAR99 EAR99 EAR99
Maximum access time 9 ns 9 ns 6.5 ns
Other features FLOW-THROUGH OR PIPELINED ARCHITECTURE FLOW-THROUGH OR PIPELINED ARCHITECTURE FLOW-THROUGH OR PIPELINED ARCHITECTURE
Maximum clock frequency (fCLK) 66 MHz 66 MHz 100 MHz
I/O type COMMON COMMON COMMON
JESD-30 code S-PQFP-G100 S-PBGA-B100 S-PBGA-B100
JESD-609 code e0 e0 e0
length 14 mm 10 mm 10 mm
memory density 73728 bit 73728 bit 73728 bit
Memory IC Type DUAL-PORT SRAM DUAL-PORT SRAM DUAL-PORT SRAM
memory width 9 9 9
Humidity sensitivity level 3 3 3
Number of functions 1 1 1
Number of ports 2 2 2
Number of terminals 100 100 100
word count 8192 words 8192 words 8192 words
character code 8000 8000 8000
Operating mode SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
Maximum operating temperature 70 °C 70 °C 70 °C
organize 8KX9 8KX9 8KX9
Output characteristics 3-STATE 3-STATE 3-STATE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code LFQFP LFBGA LFBGA
Encapsulate equivalent code QFP100,.63SQ,20 BGA100,10X10,32 BGA100,10X10,32
Package shape SQUARE SQUARE SQUARE
Package form FLATPACK, LOW PROFILE, FINE PITCH GRID ARRAY, LOW PROFILE, FINE PITCH GRID ARRAY, LOW PROFILE, FINE PITCH
Parallel/Serial PARALLEL PARALLEL PARALLEL
Peak Reflow Temperature (Celsius) 240 225 225
power supply 5 V 5 V 5 V
Certification status Not Qualified Not Qualified Not Qualified
Maximum seat height 1.4 mm 1.4 mm 1.4 mm
Maximum standby current 0.003 A 0.003 A 0.003 A
Minimum standby current 4.5 V 4.5 V 4.5 V
Maximum slew rate 0.36 mA 0.36 mA 0.43 mA
Maximum supply voltage (Vsup) 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) 4.5 V 4.5 V 4.5 V
Nominal supply voltage (Vsup) 5 V 5 V 5 V
surface mount YES YES YES
technology CMOS CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL
Terminal surface Tin/Lead (Sn85Pb15) Tin/Lead (Sn63Pb37) Tin/Lead (Sn63Pb37)
Terminal form GULL WING BALL BALL
Terminal pitch 0.5 mm 0.8 mm 0.8 mm
Terminal location QUAD BOTTOM BOTTOM
Maximum time at peak reflow temperature 20 NOT SPECIFIED NOT SPECIFIED
width 14 mm 10 mm 10 mm
Base Number Matches 1 1 1
Maker - IDT (Integrated Device Technology) IDT (Integrated Device Technology)

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