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S25FS256SDSBHV200

Description
Memory Controller, BGA-24
Categorystorage    storage   
File Size5MB,151 Pages
ManufacturerCypress Semiconductor
Environmental Compliance
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S25FS256SDSBHV200 Overview

Memory Controller, BGA-24

S25FS256SDSBHV200 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
Objectid8004809185
package instructionBGA-24
Reach Compliance Codecompliant
ECCN code3A991.B.1.A
Samacsys ManufacturerCypress Semiconductor
Samacsys Modified On2019-10-25 07:44:39
Spare memory width2
startup blockBOTTOM
Maximum clock frequency (fCLK)80 MHz
JESD-30 codeR-PBGA-B24
length8 mm
memory density268435456 bit
Memory IC TypeFLASH
memory width4
Humidity sensitivity level3
Number of functions1
Number of terminals24
word count67108864 words
character code64000000
Operating modeSYNCHRONOUS
Maximum operating temperature105 °C
Minimum operating temperature-40 °C
organize64MX4
Package body materialPLASTIC/EPOXY
encapsulated codeTBGA
Package shapeRECTANGULAR
Package formGRID ARRAY, THIN PROFILE
Parallel/SerialSERIAL
Programming voltage1.8 V
Maximum seat height1.2 mm
Maximum slew rate0.1 mA
Maximum supply voltage (Vsup)2 V
Minimum supply voltage (Vsup)1.7 V
Nominal supply voltage (Vsup)1.8 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formBALL
Terminal pitch1 mm
Terminal locationBOTTOM
typeNOR TYPE
width6 mm
S25FS128S
S25FS256S
1.8 V, Serial Peripheral Interface
with Multi-I/O, MirrorBit
®
Non-Volatile Flash
Features
Density
– S25FS128S-128 Mbits (16 Mbytes)
– S25FS256S-256 Mbits (32 Mbytes)
Serial Peripheral Interface (SPI)
– SPI Clock polarity and phase modes 0 and 3
– Double Data Rate (DDR) option
– Extended Addressing: 24- or 32-bit address options
– Serial Command subset and footprint compatible with
S25FL-A, S25FL-K, S25FL-P, and S25FL-S SPI families
– Multi I/O Command subset and footprint compatible with
S25FL-P, and S25FL-S SPI families
Read
– Commands: Normal, Fast, Dual I/O, Quad I/O, DDR Quad
I/O
– Modes: Burst Wrap, Continuous (XIP), QPI
– Serial Flash Discoverable Parameters (SFDP) and
Common Flash Interface (CFI), for configuration
information
Program
– 256- or 512-byte Page Programming buffer
– Program suspend and resume
– Automatic ECC – internal hardware Error Correction Code
generation with single-bit error correction
Erase
– Hybrid sector option
– Physical set of eight 4-kbyte sectors and one 32-kbyte
sector at the top or bottom of address space with all
remaining sectors of 64 kbytes
– Uniform sector option
– Uniform 64-kbyte or 256-kbyte blocks for software
compatibility with higher density and future devices
– Erase suspend and resume
– Erase status evaluation
– 100,000 Program-Erase Cycles, minimum
– 20 Year Data Retention, minimum
Security Features
– One-Time Program (OTP) array of 1024 bytes
– Block Protection:
– Status Register bits to control protection against
program or erase of a contiguous range of sectors
– Hardware and software control options
– Advanced Sector Protection (ASP)
– Individual sector protection controlled by boot code or
password
– Option for password control of read access
Technology
– Cypress 65 nm MirrorBit
®
Technology with Eclipse
Architecture
Supply Voltage
– 1.7V to 2.0V
Temperature Range / Grade
– Industrial (-40°C to +85°C)
– Industrial Plus (–40°C to +105°C)
– Automotive AEC-Q100 Grade 3 (–40°C to +85°C)
– Automotive AEC-Q100 Grade 2 (–40°C to +105°C)
– Automotive AEC-Q100 Grade 1 (–40°C to +125°C)
Packages (All Pb-Free)
– 8-lead SOIC 208 mil (SOC008) — FS128S only
– WSON 6
5 mm (WND008) — FS128S only
– WSON 6
8 mm (WNH008)
– 16-lead SOIC 300 mil (SO3016 — FS256S only)
– BGA-24 6
8 mm
– 5
5 ball (FAB024) footprint
– 4
6 ball (FAC024) footprint
Known Good Die, and Known Tested Die
Cypress Semiconductor Corporation
Document Number: 002-00368 Rev. *J
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised April 21, 2017
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