Dynamic performance is achieved when SCLK operates in burst mode. Operating a free running SCLK during the acquisition phase degrades dynamic performance.
See the Terminology section.
3
Sample tested during initial release to ensure compliance.
4
SCLK is operating in burst mode and CS is idling high. With a free running SCLK and CS pulled low, the I
DD
static current is increased by 60 µA typical at V
DD
= 5.25 V.
TIMING SPECIFICATIONS
V
DD
= 2.09 V to 5.25 V, T
A
= −40°C to +125°C, unless otherwise noted. Signals are specified from 10% to 90% of V
DD
with a load
capacitance of 12 pF on the output pin.
1
Table 2.
Parameter
f
SCLK
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
10
t
11
t
12
t
13
t
QUIET
1
Limit at T
MIN
, T
MAX
50
8
7
0.4 t
SCLK
3
0.4 t
SCLK
15
10
650
6
18
8
8
100
50
Unit
MHz max
ns max
ns max
ns min
ns min
ns min
ns max
ns min
ns max
ns min
ns max
ns min
ns min
µs max
ns min
Description
Frequency of serial read clock
Delay from the end of a conversion until SDO exits the three-state condition
Data access time after SCLK falling edge
SCLK high pulse width
SCLK to data valid hold time
SCLK low pulse width
SCLK falling edge to SDO high impedance
CONVST pulse width
Conversion time
CS low time before the end of a conversion
Delay from CS falling edge until SDO exits the three-state condition
CS high time before the end of a conversion
Delay from the end of a conversion until the CS falling edge
Power-up time
Time between the last SCLK edge and the next CONVST pulse
Sample tested during initial release to ensure compliance.
Rev. B | Page 4 of 20
Data Sheet
ABSOLUTE MAXIMUM RATINGS
T
A
= 25°C, unless otherwise noted.
Table 3.
Parameter
V
DD
to GND
Analog Input Voltage to GND
Digital Input Voltage to GND
Digital Output Voltage to GND
Input Current to Any Pin Except
Supplies
1
Operating Temperature Range
Storage Temperature Range
Junction Temperature
ESD
Human Body Model (HBM)
Field-Induced Charged Device
Model (FICDM)
1
AD7091
THERMAL RESISTANCE
Table 4. Thermal Resistance
Rating
−0.3 V to +7 V
−0.3 V to V
DD
+ 0.3 V
−0.3 V to V
DD
+ 0.3 V
−0.3 V to V
DD
+ 0.3 V
±10 mA
−40°C to +125°C
−65°C to +150°C
150°C
±2.5 kV
±1.5 kV
Package Type
8-Lead LFCSP
θ
JA
36.67
θ
JC
6.67
Unit
°C/W
ESD CAUTION
Transient currents of up to 100 mA do not cause silicon controlled rectifier
(SCR) latch-up.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
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GD32 MCU
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