AT97SC3205T-X3A16-20 datasheet, PDF

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AT97SC3205T-X3A16-20: Description8-bit Microcontrollers - MCU FF Com I2C TPM 4.4mm TSSOP UEKFF; Categorysemiconductor The embedded processor and controller; File Size319KB，10 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com; Environmental Compliance

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8-bit Microcontrollers - MCU FF Com I2C TPM 4.4mm TSSOP UEKFF

AT97SC3205T-X3A16-20 Parametric

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Manufacturer	Microchip
Product Category	8-bit Microcontrollers - MCU
RoHS	Details
Packaging	Reel
Factory Pack Quantity	1000

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AT97SC3205T

Trusted Platform Module

C Interface

SUMMARY DATASHEET

Features



Compliant to the Trusted Computing Group (TCG) Trusted Platform Module

(TPM) Version 1.2 Specification

Single-chip Turnkey Solution

Hardware Asymmetric Crypto Engine

Atmel AVR

RISC Microprocessor

Internal EEPROM Storage for RSA Keys

400kHz Fast Mode/100kHz Standard Mode I

C Operation

Secure Hardware and Firmware Design and Device Layout

FIPS-140-2 Module Certified Including the High-quality Random Number

Generator (RNG), HMAC, AES, SHA, and RSA Engines

NV Storage Space for 2066 bytes of User Defined Data

3.3V Supply Voltage

28-lead Thin TSSOP or 32-pad QFN Packages

Offered in Commercial (0C to 70C) and Industrial (-40 to +85C)

Temperature Range

Description

Atmel AT97SC3205T is a fully integrated security module designed to be

integrated into embedded systems. It implements version 1.2 of the Trusted

Computing Group (TCG) specification for Trusted Platform Modules (TPM).

This is a summary document.

The complete document is

available under NDA. For more

information, please contact

your local Atmel sales office.

Atmel-8883AS-TPM-AT97SC3205T-Datasheet-Summary_022014

Table 1-2.

Pin Descriptions

Description

Power Supply, 3.3V.

Care should be taken to prevent excessive noise. Effective decoupling of the V

inputs to the Atmel TPM is critical to assure consistently reliable operation over the lifetime of the

system. The Atmel recommendation is for a decoupling bypass capacitor within the range of 2200pF to

4700pF to be placed as close as possible <5mm to each of the V

pins; located between each V

and the immediately adjacent GND pin. A 0.1μF decoupling bypass capacitor should be placed at the

node in which these V

traces join as close as possible; <10mm to the TPM. In all cases, this bypass

capacitor should be closer than the next closest component. All capacitors should be of high quality with

dielectric ratings of X5R or X7R. A low-power state is automatically entered when the device is idle. No

further action is required by the system to enter low-power mode.

System Ground.

Reset Active-Low.

Pulsing this signal low resets the internal state of the TPM and is equivalent to

removal/restoration of power to the device. The required minimum reset pulse width is 2μs. On power-

up, it is critical that Reset be kept active low until V

stabilizes.

C Data Input/Output.

This pin serves as the Data Input/Output for the TPM. If one attempts to

communicate over the interface at close to the rated speed of 400kHz, the size of the pull-ups on

SM_DAT can be critical. A known value that functions properly at 400kHz is 800 on the SM_DAT line.

One may experiment with different pull-up values and/or reduce the clock rate if desired.

C Clock Input.

This pin serves as the Serial Clock Input to the TPM. If one attempts to communicate

over the interface at close to the rated speed of 400kHz, the size of the pull-ups on SM_CLK can be

critical. A known value that functions properly at 400kHz is 1.5K on the SM_CLK line. One may

experiment with different pull-up values and/or reduce the clock rate if desired.

The TPM communication stability is increased the closer to a 50% duty cycle on the SM_CLK signal

that can be provided. Although this becomes more critical at the rated speed of 400kHz, improvements

from a 50% duty cycle can result at lower speeds as well.

GND

LRESET#

SM_DAT

SM_CLK

GPIO

General Purpose Input/Output.

If not used, tie high or low.

General Purpose Input/Output.

Internal pull-up resistor. This pin is mapped to NV Index

TPM_NV_INDEX_GPIO_00 and serves as the GPIO-Express-00. Default TPM configuration: GPIO

Input. GPIO-Express-00 also serves as the XOR chain Output during I/O test mode. Since

GPIO-Express-00 has an internal pull-up it should be left floating if unused.

General Purpose Input/Output.

Internal pull-down resistor. This pin is an indicator for hardware

physical presence; active high. Default TPM configuration: GPIO input. Since PP/GPIO has an internal

pull-down, it should be left floating if unused.

Test Input.

TestI manufacturing test input disabled after manufacturing. Tie TestI to ground directly or

through a 4.7K resistor.

Test Input.

The Atmel TPM does not support legacy addressing via the optional BADD implementation

of this pin.The TestBI pin serves as the XTAMPER pin or an additional GPIO pin, active high. (See the

application note, “Atmel Specific TPM Commands Reference Guide,” for details on XTAMPER

implementation). If unused, this pin should be tied to ground directly or through a 4.7K resistor.

Low-Power Sleep Recovery.

These two pins serve as the mechanism to allow the TPM to recover

from its low-power sleep state after receiving the Atmel Specific command TPM_DeepSleep (See Atmel

TPM Specific Commands document for further details). These pins must both be pulsed active low in

order to recover from the low-power sleep state. If unused, pin 7 can be left floating or tied to GND

either directly or through a 4.7K resistor. Pin 22 should be tied to GND or V

either directly or through

a 4.7K resistor.

GPIO-Express-00

PP/GPIO

TestI

TestBI/GPIO/

XTAMPER

TWI_Wakeup#

AT97SC3205T [SUMMARY DATASHEET]

Atmel-8883AS-TPM-AT97SC3205T-Datasheet-Summary_022014

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