Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(Typical
Operating Circuit,
V+ = 2.5V to 5.5V, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at V+ = 5V, T
A
= +25°C.)
(Note 1)
PARAMETER
Operating Supply Voltage
Supply Current (Interface
Running)
Standby Current (Interface Idle)
Power-On Reset Voltage
Input Low Voltage
SDA, SCL, AD0, AD1, AD2, P0–P7
Input High Voltage
SDA, SCL, AD0, AD1, AD2, P0–P7
Maximum Allowed Input Current
through Protection Diode P0–P7
Output Low Current SDA
Input Leakage Current
SDA, SCL, AD0, AD1, AD2, P0–P7
Input Capacitance
SDA, SCL, AD0, AD1, AD2
Port Output-Low Output Current
P0–P7
Ports Output-High Output Current
P0–P7
Output-High Transient Pullup
Current P0–P7
Input Capacitance P0–P7
Interrupt Output-Low Current
INT
SYMBOL
V+
I+
I+
V
POR
V
IL
V
IH
I
PPROT
I
OLSDA
I
IH
, I
IL
C
I2C
I
OL
I
OH
I
OHt
C
P
I
OLINT
V
SDA
= 0.4V
Pin at V+ or GND
Pin at GND (Note 2)
V
OL
= 1V, V+ = 5V
V
OH
= GND
Sources during acknowledge, V
OH
= GND,
V+ = 2.5V
(Note 2)
V
OLINT
= 0.4V
1.6
10
30
1
10
25
300
3
-0.25
+0.25
7
0.7 x
V+
±400
f
SCL
= 100kHz, other digital inputs at V+ or
GND
SCL, SDA, and other digital inputs at V+ or
GND
CONDITIONS
MIN
2.5
40
1
1.3
TYP
MAX
5.5
100
10
2.4
0.3 x
V+
UNITS
V
µA
µA
V
V
V
µA
mA
µA
pF
mA
µA
mA
pF
mA
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Maxim Integrated
│
2
MAX7328/MAX7329
I
2
C Port Expanders with Eight I/O Ports
Port And Interrupt
INT
Timing Characteristics
(Typical
Operating Circuit,
V+ = 2.5V to 5.5V, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at V+ = 5V, T
A
= +25°C.)
(Note 1)
PARAMETER
Port Output Data Valid
Port Input Setup Time
Port Input Hold Time
INT
Input Data Valid Time
INT
Reset Delay Time from
Acknowledge
SYMBOL
t
PPV
t
PSU
t
PH
t
IV
t
IR
C
L
≤ 100pF
C
L
≤ 100pF
C
L
≤ 100pF
C
L
≤ 100pF
C
L
≤ 100pF
0
4
4
4
CONDITIONS
MIN
TYP
MAX
4
UNITS
µs
µs
µs
µs
µs
Timing Characteristics
(Typical
Operating Circuit,
V+ = 2.5V to 5.5V, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at V+ = 5V, T
A
= +25°C.)
(Note 1)
PARAMETER
Serial Clock Frequency
Tolerable Spike Width on Bus
Bus Free Time between STOP
and START
START or Repeated START Setup
Time
START or Repeated START Hold
Time
SCL Clock Low Period
SCL Clock High Period
SDA and SCL Rise Time
SDA and SCL Fall Time
Data Setup Time
Data Hold Time
SCL Low to Data-Out Valid
STOP Condition Setup Time
Capacitive Load for Each Bus Line
SYMBOL
f
SCL
t
SP
t
BUF
t
SU, STA
t
HD, STA
t
LOW
t
HIGH
t
R
t
F
t
SU, DAT
t
HD, DAT
t
VD, DAT
t
SU, STO
C
b
(Note 2)
(Note 3)
SCL low to SDA output valid
4
400
(Note 2)
(Note 2)
250
0.9
3.4
(Note 2)
4.7
4.7
4
4.7
4
1
300
CONDITIONS
MIN
TYP
MAX
100
100
UNITS
kHz
ns
µs
µs
µs
µs
µs
µs
ns
ns
µs
µs
µs
pF
Note 1:
All parameters are tested at T
A
= +25°C. Specifications over temperature are guaranteed by design.
Note 2:
Guaranteed by design.
Note 3:
A master device must provide a hold time of at least 300ns for the SDA signal (referred to V
IL
of the SCL signal) to bridge
the undefined region of SCL’s falling edge.
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│
3
MAX7328/MAX7329
I
2
C Port Expanders with Eight I/O Ports
Pin Description
PIN
SO
1, 2, 3
4–7, 9–12
8
13
14
15
16
—
SSOP/TSSOP
6, 7, 9
10, 11, 12, 14,
16, 17, 19, 20
15
1
2
4
5
3, 8, 13, 18
NAME
AD0, AD1,
AD2
P0–P7
GND
INT
SCL
SDA
V+
N.C.
FUNCTION
Address Inputs. AD0, AD1, and AD2 set device slave address. Connect AD0, AD1,
and AD2 to either GND or V+. See Tables 1 and 2.
Input/Output Ports. P0–P7 are open-drain I/Os.
Ground
Interrupt Output.
INT
is an open-drain output rated at 5.5V.
I
2
C-Compatible Serial-Clock Input
I
2
C-Compatible Serial-Data I/O
Positive Supply Voltage. Bypass V+ to GND with a 0.047µF ceramic capacitor.
No Connection. Internally not connected.
WRITE PULSE
100µA
DATA FROM
SHIFT REGISTER
D
FF
CLK
POWER-ON
RESET
READ PULSE
DATA TO
SHIFT REGISTER
S
Q
MAX7328
MAX7329
V+
P0–P7
D
FF
CLK
S
TO INTERRUPT
LOGIC
Q
GND
Figure 1. Block Diagram
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Maxim Integrated
│
4
MAX7328/MAX7329
I
2
C Port Expanders with Eight I/O Ports
Table 1. MAX7328 Slave ID Address Selection
PIN CONNECTION
AD2
GND
GND
GND
GND
V+
V+
V+
V+
AD1
GND
GND
V+
V+
GND
GND
V+
V+
AD0
GND
V+
GND
V+
GND
V+
GND
V+
A6
0
0
0
0
0
0
0
0
A5
1
1
1
1
1
1
1
1
DEVICE ADDRESS
A4
0
0
0
0
0
0
0
0
A3
0
0
0
0
0
0
0
0
A2
0
0
0
0
1
1
1
1
A1
0
0
1
1
0
0
1
1
A0
0
1
0
1
0
1
0
1
P7
1
1
1
1
1
1
1
1
PORTS POWER-UP DEFAULT
P6
1
1
1
1
1
1
1
1
P5
1
1
1
1
1
1
1
1
P4
1
1
1
1
1
1
1
1
P3
1
1
1
1
1
1
1
1
P2
1
1
1
1
1
1
1
1
P1
1
1
1
1
1
1
1
1
P0
1
1
1
1
1
1
1
1
Table 2. MAX7329 Slave ID Address Selection
PIN CONNECTION
AD2
GND
GND
GND
GND
V+
V+
V+
V+
AD1
GND
GND
V+
V+
GND
GND
V+
V+
AD0
GND
V+
GND
V+
GND
V+
GND
V+
A6
0
0
0
0
0
0
0
0
A5
1
1
1
1
1
1
1
1
DEVICE ADDRESS
A4
1
1
1
1
1
1
1
1
A3
1
1
1
1
1
1
1
1
A2
0
0
0
0
1
1
1
1
A1
0
0
1
1
0
0
1
1
A0
0
1
0
1
0
1
0
1
P7
1
1
1
1
1
1
1
1
PORTS POWER-UP DEFAULT
P6
1
1
1
1
1
1
1
1
P5
1
1
1
1
1
1
1
1
P4
1
1
1
1
1
1
1
1
P3
1
1
1
1
1
1
1
1
P2
1
1
1
1
1
1
1
1
P1
1
1
1
1
1
1
1
1
P0
1
1
1
1
1
1
1
1
Detailed Description
Functional Overview
The MAX7328/MAX7329 are general-purpose port
expanders operating from a 2.5V to 5.5V supply that pro-
vide eight open-drain input/output ports with a 20mA sink
capability. The devices are rated to sink up to 100mA at
once, from any combination of ports. The port outputs can
drive loads connected to any voltage up to the MAX7328/
MAX7329’s supply voltage.
The MAX7328 is set to one of eight I
2
C slave addresses
0x20 to 0x27, and the MAX7329 is set to one of eight I
2
C
slave addresses, 0x38 to 0x3F, using the address inputs
AD2, AD1, and AD0. The parts are accessed over an I
2
C
serial interface up to 100kHz.
Any port can be configured as a logic input by setting
the port output logic-high. The MAX7328/MAX7329 do
not distinguish between a port used as an input and a
port used as an output that happens to be high. When a
MAX7328 or MAX7329 is read through the serial inter-
face, the actual logic levels at the port pins are read back.
When an I/O port is high, an internal pullup to V+ is active.
The pullup is enabled only when the output is high, and
is turned off when the output is low to reduce quiescent
current. An additional strong pullup to V+ allows fast-rising
edges into heavily loaded outputs. These strong pullups
turn on when an output is written high, and are switched
off by the falling edge of SCL (Figure 2).
The MAX7328/MAX7329 provide an open-drain output
(INT). An interrupt is generated by any rising or falling
edge of the port inputs in the input mode. After time, t
IV
,
the signal
INT
is valid.
Resetting and reactivating the interrupt circuit is achieved
when data on the port is changed to the original setting
or data is read from or written to the port that generated
the interrupt.
Resetting occurs as follows:
● In the READ mode at the acknowledge bit after the
rising edge of the SCL signal
● In the WRITE mode at the acknowledge bit after the
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