NTD110N02R, STD110N02R
Power MOSFET
24 V, 110 A, N−Channel DPAK
Features
•
•
•
•
•
Planar HD3e Process for Fast Switching Performance
Low R
DS(on)
to Minimize Conduction Loss
Low C
iss
to Minimize Driver Loss
Low Gate Charge
Optimized for High Side Switching Requirements in
High−Efficiency DC−DC Converters
•
S Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable
•
These Devices are Pb−Free and are RoHS Compliant
MAXIMUM RATINGS
(T
J
= 25°C unless otherwise noted)
Rating
Drain−to−Source Voltage
Gate−to−Source Voltage − Continuous
Thermal Resistance − Junction−to−Case
Total Power Dissipation @ T
C
= 25°C
Drain Current
− Continuous @ T
C
= 25°C, Chip
− Continuous @ T
C
= 25°C
Limited by Package
− Continuous @ T
A
= 25°C
Limited by Wires
− Single Pulse (t
p
= 10
ms)
Thermal Resistance
− Junction−to−Ambient (Note 1)
− Total Power Dissipation @ T
A
= 25°C
− Drain Current − Continuous @ T
A
= 25°C
Thermal Resistance
− Junction−to−Ambient (Note 2)
− Total Power Dissipation @ T
A
= 25°C
− Drain Current − Continuous @ T
A
= 25°C
Operating and Storage Temperature Range
Single Pulse Drain−to−Source Avalanche
Energy − Starting T
J
= 25°C
(V
DD
= 50 Vdc, V
GS
= 10 Vdc,
I
L
= 15.5 Apk, L = 1.0 mH, R
G
= 25
W)
Maximum Lead Temperature for Soldering
Purposes, (1/8″ from case for 10 s)
Symbol
V
DSS
V
GS
R
qJC
P
D
I
D
I
D
I
D
I
D
R
qJA
P
D
I
D
R
qJA
P
D
I
D
T
J
, T
stg
E
AS
Value
24
±20
1.35
110
110
110
32
110
52
2.88
17.5
100
1.5
12.5
−55 to
175
120
Unit
V
V
°C/W
W
A
A
A
A
°C/W
W
A
°C/W
W
A
°C
mJ
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V
(BR)DSS
24 V
R
DS(on)
TYP
4.1 mW @ 10 V
D
I
D
MAX
110 A
N−Channel
G
S
4
1 2
3
DPAK
CASE 369AA
(Surface Mount)
STYLE 2
MARKING DIAGRAM
& PIN ASSIGNMENT
4
Drain
AYWW
T
110N2G
2
1
3
Drain
Gate
Source
A
Y
WW
T110N2
G
= Assembly Location*
= Year
= Work Week
= Device Code
= Pb−Free Package
* The Assembly Location code (A) is front side
optional. In cases where the Assembly Location is
stamped in the package, the front side assembly
code may be blank.
T
L
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. When surface mounted to an FR4 board using 0.5 sq in drain pad size.
2. When surface mounted to an FR4 board using the minimum recommended
pad size.
ORDERING INFORMATION
See detailed ordering and shipping information on page 5 of
this data sheet.
©
Semiconductor Components Industries, LLC, 2014
1
September, 2014 − Rev. 11
Publication Order Number:
NTD110N02R/D
NTD110N02R, STD110N02R
ELECTRICAL CHARACTERISTICS
(T
J
= 25°C unless otherwise noted)
Characteristic
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage (Note 3)
(V
GS
= 0 V, I
D
= 250
mA)
Positive Temperature Coefficient
Zero Gate Voltage Drain Current
(V
DS
= 20 V, V
GS
= 0 V)
(V
DS
= 20 V, V
GS
= 0 V, T
J
= 125°C)
Gate−Body Leakage Current (V
GS
=
±20
V, V
DS
= 0 V)
ON CHARACTERISTICS
(Note 3)
Gate Threshold Voltage (Note 3)
(V
DS
= V
GS
, I
D
= 250
mA)
Negative Threshold Temperature Coefficient
Static Drain−to−Source On−Resistance (Note 3)
(V
GS
= 10 V, I
D
= 110 A)
(V
GS
= 4.5 V, I
D
= 55 A)
(V
GS
= 10 V, I
D
= 20 A)
(V
GS
= 4.5 V, I
D
= 20 A)
Forward Transconductance (V
DS
= 10 V, I
D
= 15 A) (Note 3)
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Transfer Capacitance
SWITCHING CHARACTERISTICS
(Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
Gate Charge
(V
GS
= 4.5 V, I
D
= 40 A,
V
DS
= 10 V) (Note 3)
SOURCE−DRAIN DIODE CHARACTERISTICS
Forward On−Voltage
(I
S
= 20 A, V
GS
= 0 V) (Note 3)
(I
S
= 55 A, V
GS
= 0 V)
(I
S
= 20 A, V
GS
= 0 V, T
J
= 125°C)
(I
S
= 30 A, V
GS
= 0 V,
dI
S
/dt = 100 A/ms) (Note 3)
Reverse Recovery Stored Charge
V
SD
0.82
0.99
0.65
36.5
30
25
0.048
mC
1.2
V
(V
GS
= 10 V, V
DD
= 10 V,
I
D
= 40 A, R
G
= 3.0
W)
t
d(on)
t
r
t
d(off)
t
f
Q
T
Q
GS
Q
GD
11
39
27
21
23.6
5.1
11
22
80
40
40
28
nC
ns
(V
DS
= 20 V, V
GS
= 0 V, f = 1.0 MHz)
C
iss
C
oss
C
rss
2710
1105
450
3440
1670
640
pF
V
GS(th)
1.0
R
DS(on)
4.1
5.5
3.9
5.5
g
FS
44
1.5
5.0
2.0
mV/°C
mW
V
V
(BR)DSS
24
I
DSS
1.5
10
I
GSS
±100
nA
28
15
V
mV/°C
mA
Symbol
Min
Typ
Max
Unit
4.6
6.2
Mhos
Reverse Recovery Time
t
rr
t
a
t
b
Q
rr
ns
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Pulse Test: Pulse Width
≤
300
ms,
Duty Cycle
≤
2%.
4. Switching characteristics are independent of operating junction temperatures.
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2
NTD110N02R, STD110N02R
175
I
D
, DRAIN CURRENT (AMPS)
150
125
100
75
50
25
0
0
2
4
6
8
10 V
8V
6V
210
5V
4.5 V
4.2 V
4V
3.8 V
3.6 V
3.4 V
3.2 V
T
J
= 25°C
I
D
, DRAIN CURRENT (AMPS)
180
150
120
90
60
30
0
10
0
2
T
J
= −55°C
4
6
8
V
GS
, GATE−TO−SOURCE VOLTAGE (VOLTS)
T
J
= 175°C
T
J
= 25°C
V
DS
≥
10 V
3V
2.8 V
2.6 V
2.4 V
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
Figure 2. Transfer Characteristics
0.03
I
D
= 110 A
T
J
= 25°C
0.02
0.014
T
J
= 25°C
0.012
0.01
0.008
V
GS
= 4.5 V
0.006
0.004
V
GS
= 10 V
0.002
0
20
40
60
80 100 120 140 160 180 200 220 240
I
D
, DRAIN CURRENT (AMPS)
0.01
0
2
4
6
8
10
V
GS
, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 3. On−Resistance versus
Gate−to−Source Voltage
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
−50
I
D
= 55 A
V
GS
= 10 V
100,000
V
GS
= 0 V
I
DSS
, LEAKAGE (nA)
10,000
T
J
= 175°C
1000
100
T
J
= 100°C
10
−25
0
25
50
75
100
125
150
175
0
5.0
10
15
20
25
T
J
, JUNCTION TEMPERATURE (°C)
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
versus Voltage
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3
NTD110N02R, STD110N02R
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
V
GS
, GATE−TO−SOURCE VOLTAGE (VOLTS)
5000
C
iss
5
Q
T
4
V
GS
3
Q
GS
V
DS
Q
DS
12
16
20
V
DS
= 0 V V
GS
= 0 V
T
J
= 25°C
C, CAPACITANCE (pF)
4000
3000
C
iss
2000
C
rss
1000
0
10
5
V
GS
0
V
DS
5
10
15
C
oss
C
rss
20
2
8
1
0
0
5
10
15
I
D
= 40 A
T
J
= 25°C
20
4
0
25
Q
g
, TOTAL GATE CHARGE (nC)
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage versus Total Charge
120
1000
t
d(off)
t
f
t
r
I
S
, SOURCE CURRENT (AMPS)
V
DS
= 10 V
I
D
= 55 A
V
GS
= 10 V
t, TIME (ns)
100
100
80
60
40
20
0
0.4
V
GS
= 0 V
T
J
= 25°C
10
t
d(on)
1
1
10
R
G
, GATE RESISTANCE (W)
100
0.6
0.8
1.0
1.2
V
SD
, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
1000
I
D
, DRAIN CURRENT (AMPS)
V
GS
= 20 V
SINGLE PULSE
T
C
= 25°C
100
Figure 10. Diode Forward Voltage versus
Current
1 ms
10 ms
10
R
DS(on)
Limit
Thermal Limit
Package Limit
0.1
1.0
10
dc
1.0
100
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
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4
NTD110N02R, STD110N02R
1.0
D = 0.5
r(t), EFFECTIVE TRANSIENT THERMAL
RESISTANCE (NORMALIZED)
0.2
0.1
0.1
0.05
0.02
0.01
0.01
0.00001
Single Pulse
0.0001
0.001
0.01
t, TIME (s)
0.1
1.0
10
Figure 12. Thermal Response
ORDERING INFORMATION
Device
NTD110N02RT4G
STD110N02RT4G*
Package
DPAK
(Pb−Free)
DPAK
(Pb−Free)
Shipping
†
2500 / Tape & Reel
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*S Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP
Capable.
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