IC synchronous detection circuit with input signal frequency up to 2MHz

MCl496 is composed of a dual-transistor differential circuit. The output is an open collector
type, and a load resistor must be connected when using it. In order to perform DC coupling, a differential amplifier is used to
receive the signal at the output end. The OP amplifier is designed as
a level-shifting circuit with 3 times the amplification (the output generates a positive non-inverting voltage). The output offset adjustment
will destroy the differential Balance, so where, the variable resistor of sokc2 is connected in series with the bottom and top for
adjustment. The differential amplifier circuit inside the MCl496 will be saturated
    when the input exceeds 300mV , so attenuation circuits (Ri, Rs and Rz, RII), so that the input signal of MC1496 can reach several volts. Ro is used to set the detection sensitivity, and chu5 is used to set the reference current of the internal circuit. Their resistance values ​​must vary with -v. ． The parameter in the circuit diagram is -v. . Parameters when stable at -9V . Resistor Riz Ris is used as the bias of the internal differential amplifier circuit, which puts P. The pressure is divided into 1/2, and there is no special basis for selecting the ikQ well.     There are many high-level components in the synchronous detection output. This circuit uses a low-pass filter at the output end to smooth the output signal into a direct rendering.