ML12052
1.1 GHz Super Low
Power Dual Modulus
Prescaler
MECL PLL COMPONENTS ÷64/65, ÷128/129 DUAL MODULUS PRESCALER
SEMICONDUCTOR TECHNICAL DATA
Legacy Device:
Motorola MC12052A
The ML12052 is a super low power dual modulus prescaler
used in phase–locked loop applications with low power dissipa-
tion of 2.7 mW at a minimum supply voltage of 2.7 V.
The ML12052 can be used with CMOS synthesizers requiring
positive edges to trigger internal counters such as Motorola's
MC145xxx or Lansdale’s ML145xxx series in a PLL to provide
tuning signals up to 1.1 GHz in programmable frequency steps.
A Divide Ratio Control (SW) permits selection of a 64/65 or
128/129 divide ratio as desired.
The Modulus Control (MC) selects the proper divide number
after SW has been biased to select the desired divide ratio.
• 1.1 GHz Toggle Frequency
• The ML12052 is Pin and Functionally Compatible with the
Motorola or ON Semiconductor MC12022
• Low Power 1.0 mA Typical
• 2.0 mA Maximum, VCC = 2.7 to 5.5 Vdc
• Short Setup Time (tset) 16 ns Maximum @ 1.1 GHz
• Modulus Control Input Level is Compatible with Standard
CMOS and TTL
• Maximum Input Voltage Should Be Limited to 6.5 Vdc
• Operating Temperature Range TA = –40 to 85°C
8
1
SO 8 = -5P
PLASTIC PACKAGE
CASE 751
(SO–8)
SO 8
MC12052AD
ML12052-5P
Note:
Lansdale lead free (Pb) product, as it
becomes available, will be identified by a part
number prefix change from
ML
to
MLE.
PIN CONNECTIONS
IN
VCC
SW
OUT
1
2
3
4
8
7
6
5
IN
NC
MC
Gnd
FUNCTIONAL TABLE
SW
H
H
L
L
MC
H
L
H
L
Divide Ratio
64
65
128
129
(Top View)
NOTES:
1. SW: H = VCC, L = Open. A logic L can also be applied by grounding this pin,
but this is not recommended due to increased power consumption.
2. MC: H = 2.0 V to VCC, L = GND to 0.8 V.
MAXIMUM RATINGS
Characteristic
Power Supply Voltage, Pin 2
Operating Temperature Range
Storage Temperature Range
Modulus Control Input, Pin 6
Symbol
VCC
TA
Tstg
MC
Range
–0.5 to 7.0
–40 to 85
–65 to 150
–0.5 to 6.5
Unit
Vdc
°C
°C
Vdc
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ML12052
LANSDALE Semiconductor, Inc
ELECTRICAL CHARACTERISTICS
(VCC = 2.7 to 5.5 VDC, TA = –40 to 85°C, unless otherwise noted.)
Characteristic
Toggle Frequency (Sine Wave Input)
Supply Current (Pin 2)
Modulus Control Input High (MC)
Modulus Control Input Low (MC)
Divide Ratio Control Input High (SW)
Divide Ratio Control Input Low (SW)
Output Voltage Swing (Note 2)
(CL = 8.0 pF, RL = 3.3 kΩ)
Modulus Setup Time MC to Out @ 1100 MHz
Input Voltage Sensitivity 250–1100 MHz
100–250 MHz
Output Current (Note 1)
VCC = 2.7 V, CL = 8.0 pF, RL = 3.3 kΩ
VCC = 5.0 V, CL = 8.0 pF, RL = 7.2 kΩ
Symbol
ft
ICC
VIH1
VIL1
VIH2
VIL2
Vout
tset
Vin
IO
–
–
0.5
0.5
3.0
3.0
Min
0.1
–
2.0
Gnd
VCC – 0.5 V
Open
0.8
–
100
400
Typ
1.4
1.0
–
–
VCC
Open
1.1
11
–
–
Max
1.1
2.0
VCC + 0.5 V
0.8
VCC + 0.5 V
Open
–
16
1000
1000
Unit
GHz
mA
V
V
VDC
–
VPP
ns
mVPP
mA
NOTES: 1.
Divide ratio of
÷64/65
@ 1.1 GHz
2. Valid over voltage range 2.7 to 5.5 V; RL = 3.3 kΩ @ VCC = 2.7 V; RL = 7.2 kΩ @ VCC = 5.0 V
Figure 1. Logic Diagram (ML12052)
Figure 2. Modulus Setup Time
D
A
C
Q
D
B
Q
D
C
Q
QB
Prop. Delay
In
QB
C
QB
C M
In
In
Out
MC
MC Setup
D
D
C
QB
C
Q
D
QB
E
Q
C
D
F
QB
C
Q
D
QB
G
Q
D
H
C S Q
QB
MC
Out
MC Release
Modulus setup time MC to out is the MC
setup or MC release plus the prop delay.
SW
Figure 3. AC Test Circuit
VCC = 2.7 to 5.5 V
C3
Sine Wave Generator
C1
50
Ω
C2
IN
MC
GND
IN
OUT
CL
RL
EXTERNAL COMPONENTS
C1 = C2 = 1000 pF
C3 = 0.1
µF
CL = 8.0pF (Including Scope
and jig capacitance)
RL = 3.3 kΩ @ VCC = 2.7 V
RL = 7.2 kΩ @ VCC = 5.0 V
VCC
SW
MC Input
Page 2 of 5
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ML12052
LANSDALE Semiconductor, Inc
Figure 4. Typical Input Impedance versus Input Frequency
300
200
R
100
0
–100
–200
–300
OHMS
–400
–500
–600
–700
–800
jX
–900
–1000
–1100
–1200
100
MHz
200
300
400
500
600
700
800
900
1000
1100
1200
Frequency (MHz)
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ML12052
LANSDALE Semiconductor, Inc
Figure 5.. Generic block diagram showing prescaler connection to
PLL device
Prescaler
Fout
Fin
PLL
ML145146
ML145158
ML145159
ML12052
MC in
MC
VCO
Loop Filter
Figure 5 shows a generic block diagram for connecting a prescaler to a PLL device
that supports dual modulus control. Application note AN535 decribes using a two-
modulus prescaler technique.By using prescaler higher frequencies can be achieve
than by a single CMOS PLL device.
Page 4 of 5
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ML12052
LANSDALE Semiconductor, Inc
OUTLINE DIMENSIONS
SO = -5P
(ML12052-5P)
PLASTIC PACKAGE
CASE 751-06
(SO–8)
ISSUE T
A
8
D
5
C
E
1
4
H
0.25
M
B
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. DIMENSIONS ARE IN MILLIMETER.
3. DIMENSION D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOW ABLE DAMBAR
PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS
OF THE B DIMENSION AT MAXIMUM MATERIAL
CONDITION.
DIM
A
A1
B
C
D
E
e
H
h
L
MILLIMETERS
MIN
MAX
1.35
1.75
0.10
0.25
0.35
0.49
0.19
0.25
4.80
5.00
3.80
4.00
1.27 BSC
5.80
6.20
0.25
0.50
0.40
1.25
0°
7°
h
B
C
e
A
SEATING
PLANE
X 45°
θ
L
0.10
A1
B
0.25
M
C B
S
A
S
θ
Lansdale Semiconductor reserves the right to make changes without further notice to any products herein to improve reliabili-
ty, function or design. Lansdale does not assume any liability arising out of the application or use of any product or circuit
described herein; neither does it convey any license under its patent rights nor the rights of others. “Typical” parameters which
may be provided in Lansdale data sheets and/or specifications can vary in different applications, and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by the customer’s
technical experts. Lansdale Semiconductor is a registered trademark of Lansdale Semiconductor, Inc.
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