RMPA39200
June 2004
RMPA39200
37–40 GHz 1.6 Watt Power Amplifier MMIC
General Description
The Fairchild Semiconductor’s RMPA39200 is a high
efficiency power amplifier designed for use in point to point
and point to multi-point radios, and various communi-
cations applications. The RMPA39200 is a 3-stage GaAs
MMIC amplifier utilizing our advanced 0.15µm gate length
Power PHEMT process and can be used in conjunction
with other driver or power amplifiers to achieve the required
total power output.
Features
• 19dB small signal gain (typ.)
• 32dBm power out (typ.)
• Circuit contains individual source vias
• Chip size 4.28mm x 3.19mm
Device
Absolute Ratings
Symbol
Vd
Vg
Vdg
I
D
P
IN
T
C
T
STG
R
JC
Parameter
Positive DC Voltage (+5V Typical)
Negative DC Voltage
Simultaneous (Vd–Vg)
Positive DC Current
RF Input Power (from 50
Ω
source)
Operating Baseplate Temperature
Storage Temperature Range
Thermal Resistance (Channel to Backside)
Ratings
+6
-2
+8
2352
20
-30 to +85
-55 to +125
8
Units
V
V
V
mA
dBm
°C
°C
°C/W
©2004 Fairchild Semiconductor Corporation
RMPA39200 Rev. C
RMPA39200
Electrical Characteristics
(At 25°C), 50
Ω
system, Vd = +5V, Quiescent current (Idq) = 1600mA
Parameter
Frequency Range
Gate Supply Voltage (Vg)
1
Gain Small Signal (Pin = 0dBm)
(f = 37–38.5GHz)
(f = 38.5–40GHz)
Gain Variation vs. Frequency
Power Output at 1dBm Compression
(f = 37–38.5GHz)
(f = 38.5–40GHz)
Power Output Saturated (Pin = +16dBm)
(f = 37–38.5GHz)
(f = 38.5–40GHz)
Drain Current at Pin = 0dBm
Drain Current at P1dB Compression
Power Added Efficiency (PAE) at P1dB
OIP3 (17dbm/Tone) (10MHz Tone Sep.)
Input Return Loss (Pin = 0dBm)
Output Return Loss (Pin = 0dBm)
Note:
1. Typical range of negative gate voltages is -0.5 to 0.0V to set typical Idq of 1600 mA.
Min
37
Typ
-0.2
Max
40
Units
GHz
V
dB
dB
dB
dBm
dBm
dBm
dBm
mA
mA
%
dBm
dB
dB
17
16
19
17
±1.5
31
30
31
30
32
31
1600
1700
17
37
10
10
©2004 Fairchild Semiconductor Corporation
RMPA39200 Rev. C
RMPA39200
Application Information
CAUTION: THIS IS AN ESD SENSITIVE DEVICE.
Chip carrier material should be selected to have GaAs compatible thermal coefficient of expansion and high thermal
conductivity such as copper molybdenum or copper tungsten. The chip carrier should be machined, finished flat, plated with
gold over nickel and should be capable of withstanding 325°C for 15 minutes.
Die attachment for power devices should utilize Gold/Tin (80/20) eutectic alloy solder and should avoid hydrogen
environment for PHEMT devices. Note that the backside of the chip is gold plated and is used as RF and DC ground.
These GaAs devices should be handled with care and stored in dry nitrogen environment to prevent contamination of
bonding surfaces. These are ESD sensitive devices and should be handled with appropriate precaution including the use of
wrist grounding straps. All die attach and wire/ribbon bond equipment must be well grounded to prevent static discharges
through the device.
Recommended wire bonding uses 3mils wide and 0.5mil thick gold ribbon with lengths as short as practical allowing for
appropriate stress relief. The RF input and output bonds should be typically 0.012" long corresponding to a typical 2mil gap
between the chip and the substrate material.
DRAIN SUPPLY
(VDA & VDB)
MMIC CHIP
RF IN
RF OUT
GROUND
(Back of the Chip)
GATE SUPPLY
(VGA & VGB)
Figure 1. Functional Block Diagram
3.194
3.010
1.827
1.597
1.367
0.184
0.0
0.0
0.205
0.889
1.954
2.426
2.954
3.500
4.282
Dimensions in mm
Figure 2. Chip Layout and Bond Pad Locations
(Chip Size is 4.282mm x 3.194mm x 50µm. Back of chip is RF and DC Ground)
©2004 Fairchild Semiconductor Corporation
RMPA39200 Rev. C
RMPA39200
DRAIN SUPPLY (Vd = +5V)
(Connect to both VDA & VDB)
10000pF
L
100pF
BOND WIRE Ls
L
MMIC CHIP
RF IN
RF OUT
L
GROUND
(Back of Chip)
100pF
BOND WIRE Ls
L
10000pF
GATE SUPPLY (Vg)
(VGA and/or VGB)
Figure 3. Recommended Application Schematic Circuit Diagram
©2004 Fairchild Semiconductor Corporation
RMPA39200 Rev. C
RMPA39200
Vg (NEGATIVE)
10000pF
10000pF
Vd (POSITIVE)
DIE-ATTACH
80Au/20Sn
2 MIL GAP
100pF
100pF
5 MIL THICK
ALUMINA
50Ω
5 MIL THICK
ALUMINA
50Ω
RF INPUT
RF OUTPUT
L < 0.015"
(4 Places)
100pF
10000pF
100pF
10000pF
Vg (NEGATIVE)
Vd (POSITIVE)
Note:
Use 0.003" by 0.0005" Gold Ribbon for bonding. RF input and output bonds should be less than 0.015" long with stress relief.
Vd should be biased from 1 supply on both sides as shown. Vg can be biased from either or both sides from 1 supply.
Figure 4. Recommended Assembly and Bonding Diagram
©2004 Fairchild Semiconductor Corporation
RMPA39200 Rev. C
Altera SoC
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