71V124SA12PH datasheet, PDF - EEWORLD Datasheet

71V124SA12PH: DescriptionStandard SRAM, 128KX8, 12ns, CMOS, PDSO32, TSOP2-32; Categorystorage storage; File Size113KB，8 Pages; ManufacturerIDT (Integrated Device Technology)

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71V124SA12PH Overview

Standard SRAM, 128KX8, 12ns, CMOS, PDSO32, TSOP2-32

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	TSOP2
package instruction	TSOP2-32
Contacts	32
Reach Compliance Code	not_compliant
ECCN code	3A991.B.2.B
Maximum access time	12 ns
I/O type	COMMON
JESD-30 code	R-PDSO-G32
JESD-609 code	e0
length	20.95 mm
memory density	1048576 bit
Memory IC Type	STANDARD SRAM
memory width	8
Humidity sensitivity level	3
Number of functions	1
Number of terminals	32
word count	131072 words
character code	128000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	128KX8
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TSOP2
Encapsulate equivalent code	TSOP32,.46
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	240
power supply	3.3 V
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum standby current	0.01 A
Minimum standby current	3 V
Maximum slew rate	0.13 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3.15 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn85Pb15)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	10.16 mm
Base Number Matches	1

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