AS8F128K32Q-60/IT datasheet, PDF

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AS8F128K32Q-60/IT: Description128K x 32 FLASH FLASH MEMORY ARRAY; File Size371KB，22 Pages; ManufacturerAUSTIN; Websitehttp://www.austinsemiconductor.com/

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AS8F128K32Q-60/IT Overview

128K x 32 FLASH FLASH MEMORY ARRAY

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FLASH

Austin Semiconductor, Inc.

128K x 32 FLASH

FLASH MEMORY ARRAY

AVAILABLE AS MILITARY

SPECIFICATIONS

•

SMD 5962-94716

MIL-STD-883

Fast Access Times: 60, 70, 90, 120 and 150ns

Operation with single 5V (±10%)

Compatible with JEDEC EEPROM command set

Any Combination of Sectors can be Erased

Supports Full Chip Erase

Embedded Erase and Program Algorithms

TTL Compatible Inputs and CMOS Outputs

Hardware Data Protection

Data\ Polling and Toggle Bits

Low Power consumption

Individual Byte Read/ Write Control

10,000 Program/Erase Cycles

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

GND

I/O 8

I/O 9

I/O 10

I/O 11

I/O 12

I/O 13

I/O 14

I/O 15

Vcc

A11

A12

A13

A14

A15

A16

CS1\

CS2\

WE2\

WE3\

WE4\

AS8F128K32

PIN ASSIGNMENT

(Top View)

68 Lead CQFP (Q & Q1)

CS3\

GND

CS4\

WE1\

A10

Vcc

FEATURES

I/O 16

I/O 17

I/O 18

I/O 19

I/O 20

I/O 21

I/O 22

I/O 23

GND

I/O 24

I/O 25

I/O 26

I/O 27

I/O 28

I/O 29

I/O 30

I/O 31

OPTIONS

Timing

60ns

70ns

90ns

120ns

150ns

Package

Ceramic Quad Flat pack

MARKINGS

-60

-70

-90

-120

-150

No. 703

•

GENERAL DESCRIPTION

The Austin Semiconductor, Inc. AS8F128K32 is a 4 Megabit

CMOS FLASH Memory Module organized as 128K x 32 bits. The

AS8F128K32 achieves high speed access (60 to 150 ns), low power

consumption and high reliability by employing advanced CMOS

memory technology.

The device is designed to be programmed in-system with the

standard system 5.0V V

supply. A 12.0V V

is not required for

program or erase operation. The device can also be programmed or

erased in standard EPROM programmers. To eliminate bus

contention the device has seperate chip enbaled (CEx\), write enable

(WEx\) and output enable (OE) controls.

The device requires only a single 5.0 volt power supply for both

read and write functions. Internally generated and regulated voltages

are provided for the program and erase operations.

The device is entirely command set compatible with the JEDEC

single-power-supply Flash standard. Commands are written to the

command register using standard microprocessor write timings.

AS8F128K32

Rev. 2.0 5/03

controls the erase and programming circuitry. Write cycles also

internally latch addresses and data needed for the programming and

erase operations. Reading data out of the device is similar to reading

from other Flash or EPROM devices.

Device programming occurs by executing the program command

sequence. This invokes the Embedded Program algorithm—an internal

algorithm that automatically times the program pulse widths and

verifies proper cell margin.

Device erasure occurs by executing the erase command sequence.

This invokes the Embedded Erase algorithm—an internal algorithm

that automatically preprograms the array (if it is not already

programmed) before executing the erase operation. During erase, the

device automatically times the erase pulse widths and verifies proper

cell margin.

The host system can detect whether a program or erase operation

is complete by reading the I/O7 (Data\ Polling) and I/O6 (toggle)

status bits. After a program or erase cycle has been completed, the

device is ready to read array data or accept another command.

The sector erase architecture allows memory sectors to be erased

and reprogrammed without affecting the data contents of other

sectors. The device is erased when shipped from the factory.

The hardware data protection measures include a low V

detector automatically inhibits write operations during power

transitions. The hardware sector protection feature disables both

program and erase operations in any combination of the sectors of

memory, and is implemented using standard EPROM programmers.

The system can place the device into the standby mode. Power

consumption is greatly reduced in this mode.

The device electrically erases all bits within a sector

simultaneously via Fowler-Nordheim tunneling. The bytes are

programmed one byte at a time using the EPROM programming

mechanism of hot electron injection.

For more products and information

please visit our web site at

www.austinsemiconductor.com

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

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