Ultra-Low Phase Jitter SMD Clock Oscillator
ASVMX
Moisture Sensitivity Level – MSL 3
FEATURES:
• Excellent integrated phase jitter
• ±50ppm total frequency stability over -40°C to +85°C temperature range
• Output Type: LVCMOS, LVDS, LVPECL, HCSL
• Industry standard 6-Pin 7 x 5mm LGA package
ESD Sensitive
Pb
RoHS/RoHS II compliant
7.0 x 5.0 x 1.4mm
APPLICATIONS:
• Fiber Channel 10G/12G SERDES • Communications
• Backplane reference clock
•10/40/400 Gigabit Ethernet
• FPGA
gh Performance
• PCI-Express
• Storage
KEY ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings
Item
Supply Voltage
Storage Temp.
Lead Temp.(soldering, 10s)
ESD (HBM)
Parameters
Frequency
Output Type
Operating Temperature (T
A
)
Overall Frequency Stability
(1)
Supply Voltage (V
DD
)
Minimum
-0.3
-55
Maximum
+3.6
+125
+260
2
Unit
V
°C
°C
kV
Condition
Common Key Electrical Specifications – LVCMOS, LVPECL, LVDS, HCSL
Minimum
Typical
Maximum
Please see Table 1- Frequency Code for
available frequencies
LVCMOS, L VPECL, LVDS, HCSL
-40
+85
-50
+50
+2.375
+3.63
Units
Notes
°C
ppm
V
Key Electrical Specifications – LVCMOS
Parameters
Supply Current (I
DD
)
Output Logic Level
Start-up time (T
start
)
Rise Time (Tr)
Fall Time (Tf)
Duty Cycle
RMS Phase Noise
V
DD
= 2.375 - 3.63V, T
A
= -40°C to +85°C, output terminated with 50 Ohms to VDD/2.
(2)
Minimum
V
OH
V
OL
V
DD
-0.8
100
100
45
Typical
Maximum
95
0.6
20
500
500
55
Frequency dependent
Units
Notes
mA
V
V
ms
ps
No load
20% to 80%
ps
%
VDD = 2.375 - 3.63V, TA = -40°C to +85°C, outputs terminated with 50 Ohms to VDD - 2.
(2)
Key Electrical Specifications – LVPECL
Parameters
Supply Current (I
DD
)
Output Logic Level
Minimum
V
OH
V
OL
Peak to Peak Output Swing (V
swing
)
Start-up Time
Rise Time (Tr)
Fall Time (Tf)
Duty Cycle
RMS Phase Jitter
ABRACON IS
ISO9001:2008
CE RTIFIED
CE RTIFIED
Maximum
120
V
DD
-1.35
V
DD
-1.01
V
DD
-0.8
V
DD
-2.0
V
DD
-1.78
V
DD
-1.6
0.65
0.77
0.95
20
85
350
85
350
45
55
Frequency dependent
Typical
Units
mA
V
V
V
ms
ps
%
Notes
Single ended
RL=50Ω , CL=0pF
20% to 80%
LLC
2 Faraday, Suite# B
|
Irvine
|
CA 92618
Revised: 08.06.15
Ph. 949.546.8000
|
Fax. 949.546.8001
Visit
www.abracon.com
for Terms and Conditions of Sale
Ultra-Low Phase Jitter SMD Clock Oscillator
ASVMX
Moisture Sensitivity Level – MSL 3
KEY ELECTRICAL SPECIFICATIONS (Continued)
VDD = 2.375 - 3.63V, TA = -40°C to +85°C, outputs terminated with 100 Ohms between Q and /Q.
(2)
ESD Sensitive
Pb
RoHS/RoHS II compliant
7.0 x 5.0 x 1.4mm
High Performance
Key Electrical Specifications – LVDS
Parameters
Supply Current (I
DD
)
Common Mode Output Voltae (V
CM
)
Output Differential Voltage (V
OD
)
Output Logic Level
Start-up Time
Rise Time (Tr)
Fall Time (Tf)
Duty Cycle
RMS Phase Jitter
V
OH
V
OL
Minimum
1.125
247
1.248
0.898
100
100
45
Typical
1.2
350
1.375
1.025
Maximum
90
1.375
454
1.602
1.252
20
400
400
55
Units
mA
V
mV
V
V
ms
ps
%
Notes
V
OH
max = V
CM
max
+ ½ V
OD
max
V
OH
min = V
CM
min -
½ V
OD
max
RL=100Ω ,
CL=0pF
20% to 80%
Frequency dependent
Key Electrical Specifications – HCSL
Parameters
Supply Current (I
DD
)
Output Logic Level
Start-up Time
Rise Time (Tr)
Fall Time (Tf)
Duty Cycle
RMS Phase Jitter
V
OH
V
OL
VDD = 2.375 - 3.63V, TA = -40°C to +85°C, outputs terminated with 50 Ohms to VDD - 2.
(2)
Minimum
640
-150
150
150
45
Typical
700
0
Maximum
95
850
27
20
450
450
55
Units
mA
mV
mV
ms
ps
%
Notes
Notes:
1.
2.
Frequency dependent
Inclusive of initial accuracy, temperature drift, aging, shock, vibration from -40°C to +85°C.
Guaranteed after thermal equilibrium
ABRACON IS
ISO9001:2008
CE RTIFIED
CE RTIFIED
LLC
2 Faraday, Suite# B
|
Irvine
|
CA 92618
Revised: 08.06.15
Ph. 949.546.8000
|
Fax. 949.546.8001
Visit
www.abracon.com
for Terms and Conditions of Sale
Ultra-Low Phase Jitter SMD Clock Oscillator
ASVMX
Moisture Sensitivity Level – MSL 3
ESD Sensitive
Pb
RoHS/RoHS II compliant
7.0 x 5.0 x 1.4mm
PART IDENTIFICATION
High Performance
ASVMX-
Output Frequency (See Notes)
See
Table 1
for developed
frequencies.
e.g. 156.250 for 156.250MHz
83.333333 for 83.333333MHz
Frequency Code
See
Table 1
for frequency codes
and the corresponding developed
frequencies
MHz-
-
Packaging
Blank: Bulk or Tube
T: Tape & Reel
Output Format Code
See
Table 2
for output
format codes
Overall Frequency Stability
B: ±50ppm over -40°C ~ +85°C
for OE= Pin 1
N: ±50ppm over -40°C ~ +85°C
for OE= Pin 2
Table 1 – Frequency Codes vs. Developed Frequencies
3E
687.5
593.75
437.5
343.75
218.75
125
93.75
62.5
31.25
3D
833.33333
666.66667
533.33333
416.66667
333.33333
266.66667
166.66667
133.33333
83.333333
66.666666
33.333333
Frequency Codes
3A
3N
3B
814.58334
777.6
781.25
779.16667
622.08
625
743.75001
388.8
390.625
708.33333
311.04
312.625
672.91667
194.4
195.3125
637.50001
155.52
156.25
602.08334
77.76
78.125
566.66667
38.88
39.0625
531.25
495.83334
425
389.58334
354.16667
318.75
283.33334
247.91667
212.5
177.08334
141.66667
106.25
70.833334
53.125
35.416667
3L
742.5
594
495
371.25
297
247.5
198
185.625
148.5
123.75
99
92.8125
74.25
61.875
59.4
49.5
46.40625
37.125
29.7
3S
741.75824
593.406592
494.505493
370.87912
296.703296
247.252746
197.802197
185.43956
148.351648
123.626373
98.9010987
92.71978
74.1758240
61.8131867
59.3406592
49.4505493
37.087912
29.6703296
Developed Frequencies
ABRACON IS
ISO9001:2008
CE RTIFIED
CE RTIFIED
LLC
2 Faraday, Suite# B
|
Irvine
|
CA 92618
Revised: 08.06.15
Ph. 949.546.8000
|
Fax. 949.546.8001
Visit
www.abracon.com
for Terms and Conditions of Sale
Ultra-Low Phase Jitter SMD Clock Oscillator
ASVMX
PART IDENTIFICATION
Frequency Codes
4J
4B
860.16
805.6640625
573.44
684.8144531
491.52
644.53125
430.08
402.8320313
286.72
322.265625
245.76
201.4160156
163.84
161.1328125
143.36
80.5664063
122.88
40.2832
81.92
61.44
ESD Sensitive
Pb
RoHS/RoHS II compliant
7.0 x 5.0 x 1.4mm
High Performance
Table 1 – Frequency Codes vs. Developed Frequencies (continued)
4E
840
760
680
640
560
520
480
440
360
320
280
240
160
120
80
60
40
5A
850
800
750
650
600
550
500
450
400
350
300
250
200
150
100
50
25
Note: 1. For LVCMOS output, max. output frequency is 250MHz
2. Please contact Abracon for frequencies not listed in the above table.
Output Format Codes
A: LVPECL
B: LVDS
C: LVCMOS
D: HCSL
F: LVPECL
G: LVDS
H: LVCMOS
J: HCSL
L: LVPECL
M: LVDS
N: LVCMOS
P: HCSL
R: LVPECL
S: LVDS
T: LVCMOS
U: HCSL
Developed Frequencies
Table 2 – Output Format Codes
Pinout Description
Pin #1 = O/E Active High,
Pin #4 = Q
Pullup (50kΩ)
Pin # 5 = /Q
Pin #2 = NC
Pin #6 = Vcc
Pin #3 = GND
Pin #1 = O/E Active Low,
Pulldown (50kΩ)
Pin #2 = NC
Pin #3 = GND
Pin #1 = NC
Pin #2 = O/E Active Low,
Pulldown (50kΩ)
Pin #3 = GND
Pin #1 = NC
Pin #2 = O/E Active High,
Pullup (50kΩ)
Pin #3 = GND
Pin #4 = Q
Pin # 5 = /Q
Pin #6 = Vcc
Pin #4 = Q
Pin # 5 = /Q
Pin #6 = Vcc
Pin #4 = Q
Pin # 5 = /Q
Pin #6 = Vcc
ABRACON IS
ISO9001:2008
CE RTIFIED
CE RTIFIED
LLC
2 Faraday, Suite# B
|
Irvine
|
CA 92618
Revised: 08.06.15
Ph. 949.546.8000
|
Fax. 949.546.8001
Visit
www.abracon.com
for Terms and Conditions of Sale
Ultra-Low Phase Jitter SMD Clock Oscillator
ASVMX
OUTLINE DIMENSION:
ESD Sensitive
Pb
RoHS/RoHS II compliant
7.0 x 5.0 x 1.4mm
High Performance
Recommended Land Pattern
OUTLINE DIMENSION
Ref.
A
A1
A2
D
D1
E
E1
b
c
e
f
k
m
n
Min.
1.260
0.190
1.070
4.900
Nom.
Max.
1.330
1.400
0.230
0.270
1.100
1.130
5.000
5.100
3.700 BSC
6.900
7.000
7.100
5.080 BSC
1.050
1.100
1.150
DESCRIPTION:
1.350
1.400
1.450
2.540 BSC
0.050
0.100
0.150
0.210
0.260
0.310
1.090
1.140
1.190
36
Dimensional
Tolerance
aaa
0.100
bbb
0.070
Dimensions: mm
ABRACON IS
ISO9001:2008
CE RTIFIED
CE RTIFIED
LLC
2 Faraday, Suite# B
|
Irvine
|
CA 92618
Revised: 08.06.15
Ph. 949.546.8000
|
Fax. 949.546.8001
Visit
www.abracon.com
for Terms and Conditions of Sale
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