Storage Temperature Range ............................ -45°C to +165°C
Lead Temperature (soldering, 10s) ................................. +260°C
Soldering Temperature (reflow) .......................................+300°C
ESD Stress on All Pins ........................................................±4kV
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Recommended External Components
NAME
XTAL
CXS
CXL
FROM
XIN
XIN
XOUT
TO
XOUT
GND
GND
20.000MHz
Load capacitor for crystal (exact value depends on crystal
specifications and parasitic capacitance of board)
FUNCTION
VALUE
20.000
18 ±10%
18 ±10%
UNITS
MHz
pF
pF
Recommended Operating Conditions
PARAMETER
3.3V Supply Voltage (V
DD
)
Operating Temperature
CONDITIONS
Normal operation
MIN
3.0
-40
TYP
3.3
MAX
3.6
+85
UNITS
V
°C
Performance Specifications
(Note that production tests are performed at room temperature.)
PARAMETER
INPUT LOGIC LEVELS
Digital High-Level Input Voltage (V
IH
)
Digital Low-Level Input Voltage (V
IL
)
OUTPUT
LOGIC LEVELS
I
LOAD
= 1mA
I
LOAD
= 10mA
I
LOAD
= 1mA
I
LOAD
= 10mA
V
DD
-
0.4
V
DD
-
0.6
0
0.4
0.5
V
V
V
V
2
0.8
V
V
CONDITIONS
MIN
TYP
MAX
UNITS
Digital High-Level Output Voltage (V
OH
)
Digital Low-Level Output Voltage (V
OL
)
SUPPLY
CURRENT
V
DD
Current
(Compounded)
Normal operation, V
DD
= 3.3V
8.1
10.3
mA
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Maxim Integrated
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2
MAX78615+PPM
Isolated Energy Measurement Processor
for Polyphase Monitoring Systems
Performance Specifications (continued)
(Note that production tests are performed at room temperature.)
PARAMETER
CRYSTAL OSCILLATOR
XIN to XOUT Capacitance
Capacitance to GND (Note 1)
INTERNAL RC OSCILLATOR
Nominal Frequency
Accuracy
RESET
PIN
Reset Pulse Fall Time
Reset Pulse Width
SPI SLAVE PORT (Figure 1)
SCK Cycle Time (t
SPICYC
)
Enable Lead Time (t
SPILEAD
)
Enable Lag Time (t
SPILAG
)
SCK Pulse Width (t
SPIW
)
SSB to First SCK Fall (t
SPISCK
)
Disable Time (t
SPIDIS
)
SCK to Data Out (SDO) (t
SPIEV
)
Data Input Setup Time (SDI) (t
SPISU
)
Data Input Hold Time (SDI) (t
SPIH
)
I
2
C SLAVE PORT (Figure 2, Note 1)
Bus Idle (Free) Time Between
Transmissions (STOP/START) (t
BUF
)
I
2
C Input Fall Time (t
ICF
)
I
2
C Input Rise Time (t
ICR
)
I
2
C START or Repeated START Condition
Hold Time (t
STH
)
I
2
C START or Repeated START Condition
Setup Time (t
STS
)
I
2
C Clock High Time (t
SCH
)
I
2
C Clock Low Time (t
SCL
)
I
2
C Serial Data Setup Time (t
SDS
)
I
2
C Serial Data Hold Time (t
SDH
)
I
2
C Valid Data Time (t
VDA
):
SCL Low to SDA Output Valid ACK Signal
from SCL Low to SDA (Out) Low
Note 1:
Guaranteed by design, not subject to test.
Note 2:
Dependent on bus capacitance.
(Note 2)
(Note 2)
10
5
High
Low
Ignore if SCK is low when SSB falls (Note 1)
(Note 1)
1
15
0
250
250
2
0
25
µs
ns
ns
ns
ns
ns
ns
ns
ns
V
DD
= 3.0V, 3.6V; T
A
= 22°C
(Note 1)
(Note 1)
20.000
±1.5
1
5
MHz
%
µs
µs
(Note 1)
XIN
XOUT
3
5
5
pF
pF
CONDITIONS
MIN
TYP
MAX
UNITS
1500
20
20
500
600
600
1300
100
10
900
300
300
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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Maxim Integrated
│
3
MAX78615+PPM
Isolated Energy Measurement Processor
for Polyphase Monitoring Systems
Timing Diagrams
SSB
t
SPILEAD
SCK
t
SPISCK
SDO
t
SPISU
SDI
MSB IN
t
SPIW
t
SPIEV
MSB OUT
t
SPIH
LSB IN
LSB OUT
t
SPIW
t
SPIDIS
t
SPICYC
t
SPILAG
Figure 1. SPI Timing Diagram
t
BUF
t
ICR
t
SDS
t
SDH
t
VDA
SDA
t
ICF
t
SCH
t
SCL
SCL
t
ICR
t
SCH
STOP
START
t
ICF
REPEATED
START
CONDITION
t
STS
t
SPS
STOP
CONDITION
Figure 2. I
2
C Timing Diagram
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Maxim Integrated
│
4
MAX78615+PPM
Isolated Energy Measurement Processor
for Polyphase Monitoring Systems
Pin Configuration
SDI/RX/SDAI
SDO/TX/SDA0
SCK/AD0/MP1
IFC1/MP0
RESET
V
DD
TOP VIEW
18
CH2P
CH2N
CH1P
CH1N
CH3P
CH3N
19
20
21
22
23
24
1
GND
17
16
15
14
13
12
11
COMP1
COMP2
GND
XOUT
XIN
V
DD
MAX78615+PPM
10
9
+
2
IFC0/MP8
EP
3
MP7
8
7
4
AD1/MP6
5
SSB/MP5/SCL
6
MP4
TQFN
Pin Description
PIN
1, 10
2
3
4
5
6
7, 18
8
9
10
11
12
13
14
NAME
GND
IFC0/MP8
MP7
AD1/MP6
SSB/MP5/SCL
MP4
V
DD
XIN
XOUT
GND
COMP2
COMP1
SDO/TX/SDAO
SDI/RX/SDAI
Ground
IFC0 (Interface Selection)
Multipurpose DIO
Multipurpose DIO/Address
Slave Select (SPI)/MP5/I
2
C Serial Clock
Multipurpose DIO
3.3V DC Supply
Crystal Oscillator Input
Crystal Oscillator Output
Ground
Comparator 2 Input (Not Used/Reserved), No Connection
Comparator 1 Input (Not Used/Reserved), No Connection
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