AT89LS51-16PI datasheet, PDF - EEWORLD Datasheet

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AT89LS51-16PI: Description8-bit Microcontrollers - MCU LOW VOLTAGE 4K ISP FLASH - 16MHz; CategoryThe embedded processor and controller Microcontrollers and processors; File Size318KB，32 Pages; ManufacturerAtmel (Microchip)

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AT89LS51-16PI Overview

8-bit Microcontrollers - MCU LOW VOLTAGE 4K ISP FLASH - 16MHz

AT89LS51-16PI Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Atmel (Microchip)
Parts packaging code	DIP
package instruction	0.600 INCH, PLASTIC, MS-011AC, DIP-40
Contacts	40
Reach Compliance Code	unknown
Has ADC	NO
Address bus width	16
bit size	8
CPU series	8051
maximum clock frequency	16 MHz
DAC channel	NO
DMA channel	NO
External data bus width	8
JESD-30 code	R-PDIP-T40
JESD-609 code	e0
length	52.324 mm
Number of I/O lines	32
Number of terminals	40
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
PWM channel	NO
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP40,.6
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	2.7/4 V
Certification status	Not Qualified
RAM (bytes)	128
rom(word)	4096
ROM programmability	FLASH
Maximum seat height	4.826 mm
speed	16 MHz
Maximum slew rate	25 mA
Maximum supply voltage	4 V
Minimum supply voltage	2.7 V
surface mount	NO
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	15.24 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER
Base Number Matches	1

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Features

•

Compatible with MCS

-51 Products

•

4K Bytes of In-System Programmable (ISP) Flash Memory

•

– Endurance: 10,000 Write/Erase Cycles

2.7V to 4.0V Operating Range

Fully Static Operation: 0 Hz to 16 MHz

Three-level Program Memory Lock

128 x 8-bit Internal RAM

32 Programmable I/O Lines

Two 16-bit Timer/Counters

Six Interrupt Sources

Full Duplex UART Serial Channel

Low-power Idle and Power-down Modes

Interrupt Recovery from Power-down Mode

Watchdog Timer

Dual Data Pointer

Power-off Flag

Flexible ISP Programming (Byte and Page Mode)

Green (Pb/Halide-free) Packaging Option

1. Description

The AT89LS51 is a low-voltage, high-performance CMOS 8-bit microcontroller with

4K bytes of in-system programmable Flash memory. The device is manufactured

using Atmel’s high-density nonvolatile memory technology and is compatible with the

industry-standard 80C51 instruction set and pinout. The on-chip Flash allows the pro-

gram memory to be reprogrammed in-system or by a conventional nonvolatile

memory programmer. By combining a versatile 8-bit CPU with in-system programma-

ble Flash on a monolithic chip, the Atmel AT89LS51 is a powerful microcontroller

which provides a highly-flexible and cost-effective solution to many embedded control

applications.

The AT89LS51 provides the following standard features: 4K bytes of Flash, 128 bytes

of RAM, 32 I/O lines, Watchdog timer, two data pointers, two 16-bit timer/counters, a

five-vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator,

and clock circuitry. In addition, the AT89LS51 is designed with static logic for opera-

tion down to zero frequency and supports two software selectable power saving

modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial

port, and interrupt system to continue functioning. The Power-down mode saves the

RAM contents but freezes the oscillator, disabling all other chip functions until the next

external interrupt or hardware reset.

8-bit

Low-Voltage

Microcontroller

with 4K Bytes

In-System

Programmable

Flash

AT89LS51

3053C–MICRO–6/08

4. Pin Description

4.1

VCC

Supply voltage.

4.2

GND

Ground.

4.3

Port 0

Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin can sink eight TTL

inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs.

Port 0 can also be configured to be the multiplexed low-order address/data bus during accesses

to external program and data memory. In this mode, P0 has internal pull-ups.

Port 0 also receives the code bytes during Flash programming and outputs the code bytes dur-

ing program verification.

External pull-ups are required during program verification.

4.4

Port 1

Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output buffers can

sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the inter-

nal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low

will source current (I

) because of the internal pull-ups.

Port 1 also receives the low-order address bytes during Flash programming and verification.

Port Pin

P1.5

P1.6

P1.7

Alternate Functions

MOSI (used for In-System Programming)

MISO (used for In-System Programming)

SCK (used for In-System Programming)

4.5

Port 2

Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output buffers can

sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the inter-

nal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low

will source current (I

) because of the internal pull-ups.

Port 2 emits the high-order address byte during fetches from external program memory and dur-

ing accesses to external data memory that use 16-bit addresses (MOVX @ DPTR). In this

application, Port 2 uses strong internal pull-ups when emitting 1s. During accesses to external

data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special

Function Register.

Port 2 also receives the high-order address bits and some control signals during Flash program-

ming and verification.

AT89LS51

3053C–MICRO–6/08

AT89LS51

4.6

Port 3

Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3 output buffers can

sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the inter-

nal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low

will source current (I

) because of the pull-ups.

Port 3 receives some control signals for Flash programming and verification.

Port 3 also serves the functions of various special features of the AT89LS51, as shown in the

following table.

Port Pin

P3.0

P3.1

P3.2

P3.3

P3.4

P3.5

P3.6

P3.7

Alternate Functions

RXD (serial input port)

TXD (serial output port)

INT0 (external interrupt 0)

INT1 (external interrupt 1)

T0 (timer 0 external input)

T1 (timer 1 external input)

WR (external data memory write strobe)

RD (external data memory read strobe)

4.7

RST

Reset input. A high on this pin for two machine cycles while the oscillator is running resets the

device. This pin drives High for 98 oscillator periods after the Watchdog times out. The DISRTO

bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state of bit

DISRTO, the RESET HIGH out feature is enabled.

4.8

ALE/PROG

Address Latch Enable (ALE) is an output pulse for latching the low byte of the address during

accesses to external memory. This pin is also the program pulse input (PROG) during Flash

programming.

In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be

used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped dur-

ing each access to external data memory.

If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set,

ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high.

Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.

4.9

PSEN

Program Store Enable (PSEN) is the read strobe to external program memory.

When the AT89LS51 is executing code from external program memory, PSEN is activated twice

each machine cycle, except that two PSEN activations are skipped during each access to exter-

nal data memory.

3053C–MICRO–6/08

AT89LS51-16PI Related Products

	AT89LS51-16PI
Description	8-bit Microcontrollers - MCU LOW VOLTAGE 4K ISP FLASH - 16MHz
Is it Rohs certified?	incompatible
Maker	Atmel (Microchip)
Parts packaging code	DIP
package instruction	0.600 INCH, PLASTIC, MS-011AC, DIP-40
Contacts	40
Reach Compliance Code	unknown
Has ADC	NO
Address bus width	16
bit size	8
CPU series	8051
maximum clock frequency	16 MHz
DAC channel	NO
DMA channel	NO
External data bus width	8
JESD-30 code	R-PDIP-T40
JESD-609 code	e0
length	52.324 mm
Number of I/O lines	32
Number of terminals	40
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
PWM channel	NO
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP40,.6
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	2.7/4 V
Certification status	Not Qualified
RAM (bytes)	128
rom(word)	4096
ROM programmability	FLASH
Maximum seat height	4.826 mm
speed	16 MHz
Maximum slew rate	25 mA
Maximum supply voltage	4 V
Minimum supply voltage	2.7 V
surface mount	NO
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	15.24 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER
Base Number Matches	1

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