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ICS950402YGLF-T

Description
AMD - K8 System Clock Chip
File Size139KB,19 Pages
ManufacturerICS ( IDT )
Websitehttp://www.icst.com
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ICS950402YGLF-T Overview

AMD - K8 System Clock Chip

Integrated
Circuit
Systems, Inc.
ICS950402
AMD - K8™ System Clock Chip
Recommended Application:
AMD K8 System Clock with AMD or VIA Chipset
Pin Configuration
*FS0/REF0 1
48 REF1/FS1*
Output Features:
VDDREF 2
47 GND
2 - Differential pair push-pull CPU clocks @
X1 3
46 VDDREF
3.3V
X2 4
45 REF2/FS2*
9 - PCICLK (Including 1 free running) @3.3V
GND 5
44 Reset#
*(PCICLK7/HTTCLK0)ModeA 6
43 VDDA
4 - Selectable PCICLK/HTTCLK @3.3V
*PCICLK8/HTTCLK1/ModeB 7
42 GND
1 - 48MHz, @3.3V fixed.
PCICLK9/HTTCLK2 8
41 CPUCLK8T0
1 - 24/48MHz @ 3.3V
VDDPCI 9
40 CPUCLK8C0
3 - REF @3.3V, 14.318MHz.
GND 10
39 GND
Features:
PCICLK10/HTTCLK3 11
38 VDDCPU
Programmable output frequency.
PCICLK11 12
37 CPUCLK8T1
PCICLK0 13
36 CPUCLK8C1
Programmable output divider ratios.
PCICLK1 14
35 VDDCPU
Programmable output rise/fall time.
GND 15
34 GND
Programmable output skew.
VDDPCI 16
33 GND
Programmable spread percentage for EMI
****PCICLK2 17
32 VDD
control.
****PCICLK3 18
31 48MHz/FS3**
Watchdog timer technology to reset system
VDDPCI 19
30 GND
if system malfunctions.
GND 20
29 AVDD48
PCICLK4 21
28 24_48MHz/Sel24_48#*~
Programmable watch dog safe frequency.
2
PCICLK5 22
27 GND
Support I C Index read/write and block read/
~*PCICLK_F/ModeC 23
26 SDATA
write operations.
~*(PCICLK6)PCI_STOP# 24
25 SCLK
Uses external 14.318MHz crystal.
48-Pin TSSOP/SSOP
Supports Hyper Transport Technology (HTTCLK).
* Internal Pull-Up Resistor
** Internal Pull-Down Resistor
~ This Output has 2X Drive Strength
**** This Output has 2.3X Drive Strength
Block Diagram
PLL2
/2
X1
X2
XTAL
OSC
PLL1
Spread
Spectrum
48MHz
24_48MHz
Functionality
FS3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
FS2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
FS1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
FS0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
CPU
MHz
100.90
133.90
168.00
202.00
100.20
133.50
166.70
200.40
150.00
180.00
210.00
240.00
270.00
233.33
266.67
300.00
HTT
MHz
67.27
66.95
67.20
67.33
66.80
66.75
66.68
66.80
60.00
60.00
70.00
60.00
67.50
66.67
66.67
75.00
PCI
MHz
33.63
33.48
33.60
33.67
33.40
33.38
33.34
33.40
30.00
30.00
35.00
30.00
33.75
33.33
33.33
37.50
REF (2:0)
CPU
DIVDER
Stop
CPUCLKC (1:0)
CPUCLKT (1:0)
SDATA
SCLK
FS (3:0)
MODE (A,B,C)
PCI_STOP#
24_48SEL#
Control
Logic
Config.
Reg.
PCI
DIVDER
Stop
PCICLK (6:0, 11)
PCICLK_F
X2
PCICLK/HTTCLK (3:0)
0700B—04/30/04
ICS950402

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