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5962-9461402HUA

Description
EEPROM Module, 32KX32, 120ns, Parallel, CMOS, 1.075 INCH, HIP-66
Categorystorage    storage   
File Size374KB,31 Pages
ManufacturerWhite Electronic Designs Corporation
Websitehttp://www.wedc.com/
Download Datasheet Parametric View All

5962-9461402HUA Overview

EEPROM Module, 32KX32, 120ns, Parallel, CMOS, 1.075 INCH, HIP-66

5962-9461402HUA Parametric

Parameter NameAttribute value
package instruction1.075 INCH, HIP-66
Reach Compliance Codeunknown
Maximum access time120 ns
Other featuresCONFIGURABLE AS 128K X 8
Spare memory width16
Data pollingYES
Durability10000 Write/Erase Cycles
JESD-30 codeS-XHIP-P66
JESD-609 codee0
length27.305 mm
memory density1048576 bit
Memory IC TypeEEPROM MODULE
memory width32
Number of functions1
Number of terminals66
word count32768 words
character code32000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize32KX32
Package body materialUNSPECIFIED
encapsulated codeHIP
Encapsulate equivalent codePGA66,11X11
Package shapeSQUARE
Package formIN-LINE
page size64 words
Parallel/SerialPARALLEL
power supply5 V
Programming voltage5 V
Certification statusNot Qualified
Filter levelMIL-STD-883
Maximum seat height4.34 mm
Maximum standby current0.0025 A
Maximum slew rate0.2 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTIN LEAD
Terminal formPIN/PEG
Terminal pitch2.54 mm
Terminal locationHEX
switch bitNO
width27.305 mm
write protectSOFTWARE
Base Number Matches1
REVISIONS
LTR
C
D
DESCRIPTION
Added case outline Z. Corrected the true dimensioning table feature
for case outlines U, X, and Y. -sld
Added case outline 9. Added vendor cage 0EU86 for device types 01
through 03 in the Standard Microcircuit Drawing Source Approval
Bulletin. -sld
Added case outline B. Added note to paragraph 1.2.4. -sld
Updated drawing paragraphs. -sld
DATE (YR-MO-DA)
98-08-13
00-04-19
APPROVED
K. A. Cottongim
Raymond Monnin
E
F
03-10-20
12-09-17
Raymond Monnin
Charles F. Saffle
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
F
15
F
16
F
17
F
18
REV
SHEET
PREPARED BY
Gary Zahn
CHECKED BY
Michael C. Jones
F
19
F
20
F
21
F
1
F
22
F
2
F
23
F
3
F
24
F
4
F
25
F
5
F
26
F
6
F
27
F
7
F
28
F
8
F
29
F
9
F
10
F
11
F
12
F
13
F
14
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS
AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
http://www.landandmaritime.dla.mil/
APPROVED BY
Kendall A. Cottongim
MICROCIRCUIT, HYBRID, MEMORY,
DIGITAL, 32K x 32-BIT, ELECTRICALLY
ERASABLE AND PROGRAMMABLE READ
ONLY MEMORY
DRAWING APPROVAL DATE
94-08-26
AMSC N/A
REVISION LEVEL
F
SIZE
A
SHEET
DSCC FORM 2233
APR 97
CAGE CODE
67268
1 OF
29
5962-94614
5962-E472-12
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