SM320C80 datasheet, PDF - EEWORLD Datasheet

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SM320C80: DescriptionSM320C80 Digital Signal Processors; Categorysemiconductor The embedded processor and controller; File Size3MB，158 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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SM320C80 Overview

SM320C80 Digital Signal Processors

SM320C80 Parametric

Parameter Name	Attribute value
MIPS	60
Package Group	CFP\|320,CPGA\|305
Cycle time(ns)	20
MOPS	120
Rating	Military
DMA(Ch)	1
Operating temperature range(C)	-55 to 125
Data/program memory space(words)	2.4G
DSP MHz	50

SM320C80 Related Products

	SM320C80	5962-9679101QXA	SM320C80GFM50	SM320C80HFHM50	SMJ320C80GFM50	SMJ320C80
Description	SM320C80 Digital Signal Processors	Digital Signal Processor 305-CPGA -55 to 125	Digital Signal Processors 305-CPGA -55 to 125	Digital Signal Processors 320-CFP -55 to 125	Digital Signal Processor 305-CPGA -55 to 125	SMJ320C80 Digital Signal Processor
Brand Name	-	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	-
Parts packaging code	-	PGA	PGA	QFP	PGA	-
package instruction	-	HIPGA, HSPGA305,35X35MOD	HIPGA, HSPGA305,35X35MOD	QFP-320	HIPGA, HSPGA305,35X35MOD	-
Contacts	-	305	305	320	305	-
Reach Compliance Code	-	not_compliant	not_compliant	not_compliant	not_compliant	-
ECCN code	-	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C	-
Address bus width	-	32	32	32	32	-
barrel shifter	-	YES	YES	YES	YES	-
bit size	-	32	32	32	32	-
boundary scan	-	YES	YES	YES	YES	-
maximum clock frequency	-	50 MHz	50 MHz	50 MHz	50 MHz	-
External data bus width	-	64	64	64	64	-
Format	-	FLOATING POINT	FLOATING POINT	FLOATING POINT	FLOATING POINT	-
Integrated cache	-	YES	YES	YES	YES	-
Internal bus architecture	-	MULTIPLE	MULTIPLE	MULTIPLE	MULTIPLE	-
JESD-30 code	-	S-CPGA-P305	S-CPGA-P305	S-CQFP-F320	S-CPGA-P305	-
length	-	47.25 mm	47.25 mm	7.63 mm	47.25 mm	-
low power mode	-	NO	NO	NO	NO	-
Number of DMA channels	-	1	1	1	1	-
Number of external interrupt devices	-	4	4	4	4	-
Number of terminals	-	305	305	320	305	-
Number of timers	-	3	3	3	3	-
On-chip data RAM width	-	8	8	8	8	-
Maximum operating temperature	-	125 °C	125 °C	125 °C	125 °C	-
Minimum operating temperature	-	-55 °C	-55 °C	-55 °C	-55 °C	-
Package body material	-	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	-
encapsulated code	-	HIPGA	HIPGA	GQFF	HIPGA	-
Encapsulate equivalent code	-	HSPGA305,35X35MOD	HSPGA305,35X35MOD	TPAK320,3SQ	HSPGA305,35X35MOD	-
Package shape	-	SQUARE	SQUARE	SQUARE	SQUARE	-
Package form	-	GRID ARRAY, HEAT SINK/SLUG, INTERSTITIAL PITCH	GRID ARRAY, HEAT SINK/SLUG, INTERSTITIAL PITCH	FLATPACK, GUARD RING	GRID ARRAY, HEAT SINK/SLUG, INTERSTITIAL PITCH	-
Peak Reflow Temperature (Celsius)	-	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	-
power supply	-	3.3 V	3.3 V	3.3 V	3.3 V	-
Certification status	-	Qualified	Not Qualified	Not Qualified	Not Qualified	-
RAM (number of words)	-	51200	51200	51200	51200	-
rom(word)	-	2.4G	2.4G	2.4G	2.4G	-
Maximum seat height	-	5.59 mm	5.59 mm	4.55 mm	5.59 mm	-
Maximum slew rate	-	2500 mA	2500 mA	2500 mA	2500 mA	-
Maximum supply voltage	-	3.465 V	3.465 V	3.465 V	3.465 V	-
Minimum supply voltage	-	3.135 V	3.135 V	3.135 V	3.135 V	-
Nominal supply voltage	-	3.3 V	3.3 V	3.3 V	3.3 V	-
surface mount	-	NO	NO	YES	NO	-
technology	-	CMOS	CMOS	CMOS	CMOS	-
Temperature level	-	MILITARY	MILITARY	MILITARY	MILITARY	-
Terminal form	-	PIN/PEG	PIN/PEG	FLAT	PIN/PEG	-
Terminal pitch	-	1.27 mm	1.27 mm	0.5 mm	1.27 mm	-
Terminal location	-	PERPENDICULAR	PERPENDICULAR	QUAD	PERPENDICULAR	-
Maximum time at peak reflow temperature	-	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	-
width	-	47.25 mm	47.25 mm	7.63 mm	47.25 mm	-
uPs/uCs/peripheral integrated circuit type	-	DIGITAL SIGNAL PROCESSOR, OTHER	DIGITAL SIGNAL PROCESSOR, OTHER	DIGITAL SIGNAL PROCESSOR, OTHER	DIGITAL SIGNAL PROCESSOR, OTHER	-

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