DS90LV031ATMTC/NOPB datasheet, PDF

Datasheet> All Categories > Analog mixed-signal IC> Drivers and interfaces> DS90LV031ATMTC/NOPB

DS90LV031ATMTC/NOPB: Description3V Quad CMOS Differential Line Driver 16-TSSOP -40 to 85; CategoryAnalog mixed-signal IC Drivers and interfaces; File Size1MB，25 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/; Environmental Compliance

Stay tuned Parametric Compare

DS90LV031ATMTC/NOPB Overview

3V Quad CMOS Differential Line Driver 16-TSSOP -40 to 85

DS90LV031ATMTC/NOPB Parametric

Parameter Name	Attribute value
Brand Name	Texas Instruments
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Texas Instruments
Parts packaging code	TSSOP
package instruction	TSSOP-16
Contacts	16
Reach Compliance Code	compliant
ECCN code	EAR99
Factory Lead Time	1 week
Samacsys Description	3V LVDS Quad CMOS Differential Line Driver
Differential output	YES
Number of drives	4
High level input current maximum value	0.00001 A
Input properties	STANDARD
Interface integrated circuit type	LINE DRIVER
Interface standards	EIA-644; TIA-644; IEEE 1596.3
JESD-30 code	R-PDSO-G16
JESD-609 code	e3
length	5 mm
Humidity sensitivity level	1
Number of functions	4
Number of terminals	16
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Minimum output swing	0.25 V
Output characteristics	3-STATE
Maximum output low current	0.00001 A
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Encapsulate equivalent code	TSSOP16,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260
power supply	3.3 V
Certification status	Not Qualified
Maximum receive delay
Maximum seat height	1.2 mm
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
Supply voltage 1-max	3.6 V
Mains voltage 1-minute	3 V
Supply voltage1-Nom	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Matte Tin (Sn)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
maximum transmission delay	2 ns
width	4.4 mm
Base Number Matches	1

DS90LV031ATMTC/NOPB Related Products

	DS90LV031ATMTC/NOPB	DS90LV031ATMTCX-NOPB	DS90LV031ATMTC-NOPB	DS90LV031ATMX-NOPB	DS90LV031ATM/NOPB	DS90LV031ATMTCX/NOPB	DS90LV031ATMX/NOPB	DS90LV031A
Description	3V Quad CMOS Differential Line Driver 16-TSSOP -40 to 85	LVDS Interface IC 3V LVDS Quad CMOS Diff Line Dvr	LVDS Interface IC 3V LVDS QUAD CMOS DIFF LINE DRVR	LVDS Interface IC 3V LVDS Quad CMOS Diff Line Dvr	3V Quad CMOS Differential Line Driver 16-SOIC -40 to 85	3V Quad CMOS Differential Line Driver 16-TSSOP -40 to 85	3V Quad CMOS Differential Line Driver 16-SOIC -40 to 85	DS90LV031A 3V Quad CMOS Differential Line Driver

Recommended Resources

48v to 12v circuit diagram

Audio dialing sequence decoder circuit diagram

DC converter circuit diagram suitable for multimeter a

Transistor and gate protection circuit

Homemade high-power and efficient inverter module

【Iprober 520 Current Probe】Evaluation Report (Part 3) Practical Circuit Application: This test content: For a circuit board in the laboratory, try to test the switch tube current, cooperate with the voltage probe to obtain the switching loss waveform, and summarize the usage experienc...; shzhbchina Test/Measurement

EEWORLD University - Isolated Gate Driver Challenges and Solutions: Isolated Gate Driver Challenges and Solutions : https://training.eeworld.com.cn/course/5023...; wanglan123 Talking

EEWORLD University Hall----Live playback: The latest low-power 5GHz dual-band Wi-Fi MCU fully meets high security standards: Live playback: The latest low-power 5GHz dual-band Wi-Fi MCU, fully meeting high security standards : https://training.eeworld.com.cn/course/5066...; hi5 Integrated technical exchanges

FPGA Simple Design Method for Efficient Design: Minimalistic design method for efficient design In the previous section, we described Ming Deyang's general design method. In the process of explaining the case, we drew a lot of waveform diagrams. So...; mdy-吴伟杰 FPGA/CPLD

Design of filter circuit: [size=4] After the alternating current is rectified by the diode, the direction becomes single, but the size (current intensity) is still in a state of constant change. This kind of pulsating direct c...; fish001 Analogue and Mixed Signal

Experience TouchGFX with rewards and start your creative GUI journey: [align=left][color=rgb(0, 0, 0)][font=sans-serif][size=4]Friends who are interested in GUI design, please have a look! ST invites you to experience TouGFX design tool for free, unleash your creativity...; okhxyyo stm32/stm8

Shortcut: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components