527R-03LF datasheet, PDF - EEWORLD Datasheet

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527R-03LF: DescriptionQSOP-28, Tube; Categorylogic logic; File Size332KB，10 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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527R-03LF Overview

QSOP-28, Tube

527R-03LF Parametric

Parameter Name	Attribute value
Brand Name	Integrated Device Technology
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Parts packaging code	QSOP
package instruction	SSOP-28
Contacts	28
Manufacturer packaging code	PCG28
Reach Compliance Code	unknown
ECCN code	EAR99
Input adjustment	STANDARD
JESD-30 code	R-PDSO-G28
JESD-609 code	e3
length	9.9 mm
Logic integrated circuit type	PLL BASED CLOCK DRIVER
MaximumI(ol)	0.012 A
Humidity sensitivity level	1
Number of functions	1
Number of inverted outputs	1
Number of terminals	28
Actual output times	1
Maximum operating temperature	70 °C
Minimum operating temperature
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	SSOP
Encapsulate equivalent code	SSOP28,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260
power supply	3.3 V
Certification status	Not Qualified
Maximum seat height	1.75 mm
Maximum supply voltage (Vsup)	3.45 V
Minimum supply voltage (Vsup)	3.15 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Matte Tin (Sn) - annealed
Terminal form	GULL WING
Terminal pitch	0.635 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	3.9 mm
minfmax	160 MHz
Base Number Matches	1

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DATASHEET

CLOCK SLICER USER CONFIGURABLE PECL OUTPUT ZDB

Description

The ICS527-03 is the most flexible way to generate an

output clock from an input clock with zero skew. The

user can easily configure the device to produce nearly

any output clock that is multiplied or divided from the

input clock. The part supports non-integer

multiplications and divisions. Using Phase-Locked

Loop (PLL) techniques, the device accepts an input

clock up to 200 MHz and produces an output clock up

to 160 MHz.

The ICS527-03 aligns rising edges on CLKIN with

FBPECL at a ratio determined by the reference and

feedback dividers.

For a PECL input and output clock with zero delay, use

the ICS527-04.

ICS527-03

Features

•

Packaged as 28 pin SSOP, Pb free (150 mil body)

Synchronizes fractional clocks rising edges

CMOS in to PECL out

Pin selectable dividers

Zero input to output skew

User determines the output frequency - no software

needed

Slices frequency or period

Input clock frequency of 1.5 MHz to 200 MHz

Output clock frequencies from 2.5 MHz to 160 MHz

Very low jitter

Duty cycle of 45/55

Operating voltage of 3.3 V

Advanced, low power CMOS process

Block Diagram

R6:R0

CLKIN

Divide

by 2

Reference

Divider

Phase Comparator,

Charge Pump, and

Loop Filter

FBPECL

Divide

by 2

Feedback

Divider

DIV2

F6:F0

GND

PDTS

VCO

Output

Divider

VDD

68 ohm

PECL

180 ohm

VDD

68 ohm

PECL

180 ohm

S1:S0

IDT™ / ICS™

CLOCK SLICER USER CONFIGURABLE PECL OUTPUT ZDB 1

ICS527-03

REV E 051310

527R-03LF Related Products

	527R-03LF	527R-03LFT
Description	QSOP-28, Tube	QSOP-28, Reel
Brand Name	Integrated Device Technology	Integrated Device Technology
Is it lead-free?	Lead free	Lead free
Is it Rohs certified?	conform to	conform to
Parts packaging code	QSOP	QSOP
package instruction	SSOP-28	SSOP-28
Contacts	28	28
Manufacturer packaging code	PCG28	PCG28
Reach Compliance Code	unknown	unknown
ECCN code	EAR99	EAR99
Input adjustment	STANDARD	STANDARD
JESD-30 code	R-PDSO-G28	R-PDSO-G28
JESD-609 code	e3	e3
length	9.9 mm	9.9 mm
Logic integrated circuit type	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER
MaximumI(ol)	0.012 A	0.012 A
Humidity sensitivity level	1	1
Number of functions	1	1
Number of inverted outputs	1	1
Number of terminals	28	28
Actual output times	1	1
Maximum operating temperature	70 °C	70 °C
Output characteristics	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SSOP	SSOP
Encapsulate equivalent code	SSOP28,.25	SSOP28,.25
Package shape	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260	260
power supply	3.3 V	3.3 V
Certification status	Not Qualified	Not Qualified
Maximum seat height	1.75 mm	1.75 mm
Maximum supply voltage (Vsup)	3.45 V	3.45 V
Minimum supply voltage (Vsup)	3.15 V	3.15 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL
Terminal surface	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed
Terminal form	GULL WING	GULL WING
Terminal pitch	0.635 mm	0.635 mm
Terminal location	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED
width	3.9 mm	3.9 mm
minfmax	160 MHz	160 MHz
Base Number Matches	1	1

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