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EPM5032PM28-25

Description
OT PLD, 25ns, CMOS, PDIP28, PLASTIC, DIP-28
CategoryProgrammable logic devices    Programmable logic   
File Size155KB,6 Pages
ManufacturerAltera (Intel)
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EPM5032PM28-25 Overview

OT PLD, 25ns, CMOS, PDIP28, PLASTIC, DIP-28

EPM5032PM28-25 Parametric

Parameter NameAttribute value
MakerAltera (Intel)
Parts packaging codeDIP
package instructionDIP,
Contacts28
Reach Compliance Codeunknown
ECCN code3A001.A.2.C
Other features32 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS
maximum clock frequency50 MHz
JESD-30 codeR-PDIP-T28
length34.29 mm
Dedicated input times7
Number of I/O lines16
Number of terminals28
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize7 DEDICATED INPUTS, 16 I/O
Output functionMACROCELL
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
Programmable logic typeOT PLD
propagation delay25 ns
Certification statusNot Qualified
Maximum seat height4.318 mm
Maximum supply voltage5.5 V
Minimum supply voltage4.5 V
Nominal supply voltage5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
width7.62 mm
Base Number Matches1

EPM5032PM28-25 Related Products

EPM5032PM28-25 EPM5032PC28-17 EPM5032JC28-17 EPM5032DC28-17 EPM5032JM28-25 EPM5032LC28-17 EPM5032JC28-25 EPM5032LM28-25 EPM5032JI28-25 EPM5032DM28-25
Description OT PLD, 25ns, CMOS, PDIP28, PLASTIC, DIP-28 OT PLD, 17ns, CMOS, PDIP28, PLASTIC, DIP-28 UV PLD, 17ns, CMOS, CQCC28, WINDOWED, CERAMIC, JLCC-28 UV PLD, 17ns, CMOS, CDIP28, WINDOWED, CERDIP-28 UV PLD, 25ns, CMOS, CQCC28, WINDOWED, CERAMIC, JLCC-28 OT PLD, 17ns, CMOS, PQCC28, PLASTIC, LCC-28 UV PLD, 25ns, CMOS, CQCC28, WINDOWED, CERAMIC, JLCC-28 OT PLD, 25ns, CMOS, PQCC28, PLASTIC, LCC-28 UV PLD, 25ns, CMOS, CQCC28, WINDOWED, CERAMIC, JLCC-28 UV PLD, 25ns, CMOS, CDIP28, WINDOWED, CERDIP-28
Maker Altera (Intel) Altera (Intel) Altera (Intel) Altera (Intel) Altera (Intel) Altera (Intel) Altera (Intel) Altera (Intel) Altera (Intel) Altera (Intel)
Parts packaging code DIP DIP QLCC DIP QLCC QLCC QLCC QLCC QLCC DIP
package instruction DIP, DIP, WQCCJ, WDIP, WQCCJ, QCCJ, WQCCJ, QCCJ, WQCCJ, WDIP,
Contacts 28 28 28 28 28 28 28 28 28 28
Reach Compliance Code unknown unknown unknown unknown unknown unknown unknown unknown unknown unknown
Other features 32 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS 32 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS 32 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS 32 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS 32 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS 32 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS 32 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS 32 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS 32 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS 32 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS
maximum clock frequency 50 MHz 71.4 MHz 71.4 MHz 71.4 MHz 50 MHz 71.4 MHz 50 MHz 50 MHz 50 MHz 50 MHz
JESD-30 code R-PDIP-T28 R-PDIP-T28 S-CQCC-J28 R-GDIP-T28 S-CQCC-J28 S-PQCC-J28 S-CQCC-J28 S-PQCC-J28 S-CQCC-J28 R-GDIP-T28
length 34.29 mm 34.29 mm 11.43 mm 36.83 mm 11.43 mm 11.5062 mm 11.43 mm 11.5062 mm 11.43 mm 36.83 mm
Dedicated input times 7 7 7 7 7 7 7 7 7 7
Number of I/O lines 16 16 16 16 16 16 16 16 16 16
Number of terminals 28 28 28 28 28 28 28 28 28 28
Maximum operating temperature 125 °C 70 °C 70 °C 70 °C 125 °C 70 °C 70 °C 125 °C 85 °C 125 °C
organize 7 DEDICATED INPUTS, 16 I/O 7 DEDICATED INPUTS, 16 I/O 7 DEDICATED INPUTS, 16 I/O 7 DEDICATED INPUTS, 16 I/O 7 DEDICATED INPUTS, 16 I/O 7 DEDICATED INPUTS, 16 I/O 7 DEDICATED INPUTS, 16 I/O 7 DEDICATED INPUTS, 16 I/O 7 DEDICATED INPUTS, 16 I/O 7 DEDICATED INPUTS, 16 I/O
Output function MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL
Package body material PLASTIC/EPOXY PLASTIC/EPOXY CERAMIC, METAL-SEALED COFIRED CERAMIC, GLASS-SEALED CERAMIC, METAL-SEALED COFIRED PLASTIC/EPOXY CERAMIC, METAL-SEALED COFIRED PLASTIC/EPOXY CERAMIC, METAL-SEALED COFIRED CERAMIC, GLASS-SEALED
encapsulated code DIP DIP WQCCJ WDIP WQCCJ QCCJ WQCCJ QCCJ WQCCJ WDIP
Package shape RECTANGULAR RECTANGULAR SQUARE RECTANGULAR SQUARE SQUARE SQUARE SQUARE SQUARE RECTANGULAR
Package form IN-LINE IN-LINE CHIP CARRIER, WINDOW IN-LINE, WINDOW CHIP CARRIER, WINDOW CHIP CARRIER CHIP CARRIER, WINDOW CHIP CARRIER CHIP CARRIER, WINDOW IN-LINE, WINDOW
Programmable logic type OT PLD OT PLD UV PLD UV PLD UV PLD OT PLD UV PLD OT PLD UV PLD UV PLD
propagation delay 25 ns 17 ns 17 ns 17 ns 25 ns 17 ns 25 ns 25 ns 25 ns 25 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 4.318 mm 4.318 mm 4.57 mm 5.08 mm 4.57 mm 4.572 mm 4.57 mm 4.572 mm 4.57 mm 5.08 mm
Maximum supply voltage 5.5 V 5.25 V 5.25 V 5.25 V 5.5 V 5.25 V 5.25 V 5.5 V 5.5 V 5.5 V
Minimum supply voltage 4.5 V 4.75 V 4.75 V 4.75 V 4.5 V 4.75 V 4.75 V 4.5 V 4.5 V 4.5 V
Nominal supply voltage 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V
surface mount NO NO YES NO YES YES YES YES YES NO
technology CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level MILITARY COMMERCIAL COMMERCIAL COMMERCIAL MILITARY COMMERCIAL COMMERCIAL MILITARY INDUSTRIAL MILITARY
Terminal form THROUGH-HOLE THROUGH-HOLE J BEND THROUGH-HOLE J BEND J BEND J BEND J BEND J BEND THROUGH-HOLE
Terminal pitch 2.54 mm 2.54 mm 1.27 mm 2.54 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm 2.54 mm
Terminal location DUAL DUAL QUAD DUAL QUAD QUAD QUAD QUAD QUAD DUAL
width 7.62 mm 7.62 mm 11.43 mm 7.62 mm 11.43 mm 11.5062 mm 11.43 mm 11.5062 mm 11.43 mm 7.62 mm
Base Number Matches 1 1 1 1 1 1 1 1 1 1

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