EPM5032DM28-25 datasheet, PDF - EEWORLD Datasheet

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EPM5032DM28-25: DescriptionUV PLD, 25ns, CMOS, CDIP28, WINDOWED, CERDIP-28; CategoryProgrammable logic devices Programmable logic; File Size155KB，6 Pages; ManufacturerAltera (Intel)

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EPM5032DM28-25 Overview

UV PLD, 25ns, CMOS, CDIP28, WINDOWED, CERDIP-28

EPM5032DM28-25 Parametric

Parameter Name	Attribute value
Maker	Altera (Intel)
Parts packaging code	DIP
package instruction	WDIP,
Contacts	28
Reach Compliance Code	unknown
ECCN code	3A001.A.2.C
Other features	32 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS
maximum clock frequency	50 MHz
JESD-30 code	R-GDIP-T28
length	36.83 mm
Dedicated input times	7
Number of I/O lines	16
Number of terminals	28
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	7 DEDICATED INPUTS, 16 I/O
Output function	MACROCELL
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	WDIP
Package shape	RECTANGULAR
Package form	IN-LINE, WINDOW
Programmable logic type	UV PLD
propagation delay	25 ns
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
width	7.62 mm
Base Number Matches	1

EPM5032DM28-25 Related Products

	EPM5032DM28-25	EPM5032PC28-17	EPM5032JC28-17	EPM5032DC28-17	EPM5032JM28-25	EPM5032LC28-17	EPM5032JC28-25	EPM5032LM28-25	EPM5032JI28-25	EPM5032PM28-25
Description	UV PLD, 25ns, CMOS, CDIP28, WINDOWED, CERDIP-28	OT PLD, 17ns, CMOS, PDIP28, PLASTIC, DIP-28	UV PLD, 17ns, CMOS, CQCC28, WINDOWED, CERAMIC, JLCC-28	UV PLD, 17ns, CMOS, CDIP28, WINDOWED, CERDIP-28	UV PLD, 25ns, CMOS, CQCC28, WINDOWED, CERAMIC, JLCC-28	OT PLD, 17ns, CMOS, PQCC28, PLASTIC, LCC-28	UV PLD, 25ns, CMOS, CQCC28, WINDOWED, CERAMIC, JLCC-28	OT PLD, 25ns, CMOS, PQCC28, PLASTIC, LCC-28	UV PLD, 25ns, CMOS, CQCC28, WINDOWED, CERAMIC, JLCC-28	OT PLD, 25ns, CMOS, PDIP28, PLASTIC, DIP-28
Maker	Altera (Intel)	Altera (Intel)	Altera (Intel)	Altera (Intel)	Altera (Intel)	Altera (Intel)	Altera (Intel)	Altera (Intel)	Altera (Intel)	Altera (Intel)
Parts packaging code	DIP	DIP	QLCC	DIP	QLCC	QLCC	QLCC	QLCC	QLCC	DIP
package instruction	WDIP,	DIP,	WQCCJ,	WDIP,	WQCCJ,	QCCJ,	WQCCJ,	QCCJ,	WQCCJ,	DIP,
Contacts	28	28	28	28	28	28	28	28	28	28
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown
Other features	32 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS	32 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS	32 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS	32 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS	32 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS	32 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS	32 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS	32 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS	32 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS	32 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS
maximum clock frequency	50 MHz	71.4 MHz	71.4 MHz	71.4 MHz	50 MHz	71.4 MHz	50 MHz	50 MHz	50 MHz	50 MHz
JESD-30 code	R-GDIP-T28	R-PDIP-T28	S-CQCC-J28	R-GDIP-T28	S-CQCC-J28	S-PQCC-J28	S-CQCC-J28	S-PQCC-J28	S-CQCC-J28	R-PDIP-T28
length	36.83 mm	34.29 mm	11.43 mm	36.83 mm	11.43 mm	11.5062 mm	11.43 mm	11.5062 mm	11.43 mm	34.29 mm
Dedicated input times	7	7	7	7	7	7	7	7	7	7
Number of I/O lines	16	16	16	16	16	16	16	16	16	16
Number of terminals	28	28	28	28	28	28	28	28	28	28
Maximum operating temperature	125 °C	70 °C	70 °C	70 °C	125 °C	70 °C	70 °C	125 °C	85 °C	125 °C
organize	7 DEDICATED INPUTS, 16 I/O	7 DEDICATED INPUTS, 16 I/O	7 DEDICATED INPUTS, 16 I/O	7 DEDICATED INPUTS, 16 I/O	7 DEDICATED INPUTS, 16 I/O	7 DEDICATED INPUTS, 16 I/O	7 DEDICATED INPUTS, 16 I/O	7 DEDICATED INPUTS, 16 I/O	7 DEDICATED INPUTS, 16 I/O	7 DEDICATED INPUTS, 16 I/O
Output function	MACROCELL	MACROCELL	MACROCELL	MACROCELL	MACROCELL	MACROCELL	MACROCELL	MACROCELL	MACROCELL	MACROCELL
Package body material	CERAMIC, GLASS-SEALED	PLASTIC/EPOXY	CERAMIC, METAL-SEALED COFIRED	CERAMIC, GLASS-SEALED	CERAMIC, METAL-SEALED COFIRED	PLASTIC/EPOXY	CERAMIC, METAL-SEALED COFIRED	PLASTIC/EPOXY	CERAMIC, METAL-SEALED COFIRED	PLASTIC/EPOXY
encapsulated code	WDIP	DIP	WQCCJ	WDIP	WQCCJ	QCCJ	WQCCJ	QCCJ	WQCCJ	DIP
Package shape	RECTANGULAR	RECTANGULAR	SQUARE	RECTANGULAR	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	RECTANGULAR
Package form	IN-LINE, WINDOW	IN-LINE	CHIP CARRIER, WINDOW	IN-LINE, WINDOW	CHIP CARRIER, WINDOW	CHIP CARRIER	CHIP CARRIER, WINDOW	CHIP CARRIER	CHIP CARRIER, WINDOW	IN-LINE
Programmable logic type	UV PLD	OT PLD	UV PLD	UV PLD	UV PLD	OT PLD	UV PLD	OT PLD	UV PLD	OT PLD
propagation delay	25 ns	17 ns	17 ns	17 ns	25 ns	17 ns	25 ns	25 ns	25 ns	25 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	5.08 mm	4.318 mm	4.57 mm	5.08 mm	4.57 mm	4.572 mm	4.57 mm	4.572 mm	4.57 mm	4.318 mm
Maximum supply voltage	5.5 V	5.25 V	5.25 V	5.25 V	5.5 V	5.25 V	5.25 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage	4.5 V	4.75 V	4.75 V	4.75 V	4.5 V	4.75 V	4.75 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	NO	NO	YES	NO	YES	YES	YES	YES	YES	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	MILITARY	COMMERCIAL	COMMERCIAL	COMMERCIAL	MILITARY	COMMERCIAL	COMMERCIAL	MILITARY	INDUSTRIAL	MILITARY
Terminal form	THROUGH-HOLE	THROUGH-HOLE	J BEND	THROUGH-HOLE	J BEND	J BEND	J BEND	J BEND	J BEND	THROUGH-HOLE
Terminal pitch	2.54 mm	2.54 mm	1.27 mm	2.54 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	2.54 mm
Terminal location	DUAL	DUAL	QUAD	DUAL	QUAD	QUAD	QUAD	QUAD	QUAD	DUAL
width	7.62 mm	7.62 mm	11.43 mm	7.62 mm	11.43 mm	11.5062 mm	11.43 mm	11.5062 mm	11.43 mm	7.62 mm
Base Number Matches	1	1	1	1	1	1	1	1	1	1

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