UV PLD, 90ns, 48-Cell, CMOS, CPGA68
| Parameter Name | Attribute value |
| Is it Rohs certified? | incompatible |
| Maker | Intel |
| package instruction | PGA, PGA68,11X11 |
| Reach Compliance Code | compliant |
| Other features | NO |
| In-system programmable | NO |
| JESD-30 code | S-XPGA-P68 |
| JESD-609 code | e0 |
| JTAG BST | NO |
| Number of macro cells | 48 |
| Number of terminals | 68 |
| Maximum operating temperature | 125 °C |
| Minimum operating temperature | -55 °C |
| Package body material | CERAMIC |
| encapsulated code | PGA |
| Encapsulate equivalent code | PGA68,11X11 |
| Package shape | SQUARE |
| Package form | GRID ARRAY |
| power supply | 5 V |
| Programmable logic type | UV PLD |
| propagation delay | 90 ns |
| Certification status | Not Qualified |
| Filter level | 38535Q/M;38534H;883B |
| Nominal supply voltage | 5 V |
| surface mount | NO |
| technology | CMOS |
| Temperature level | MILITARY |
| Terminal surface | Tin/Lead (Sn/Pb) |
| Terminal form | PIN/PEG |
| Terminal pitch | 2.54 mm |
| Terminal location | PERPENDICULAR |
| Base Number Matches | 1 |
EEWorld
subscription
account
EEWorld
service
account
Automotive
development
circle
京公网安备 11010802033920号
EEWORLD