Current Output, Parallel Input, 16-/14-Bit
Multiplying DACs with Four-Quadrant Resistors
Data Sheet
FEATURES
16-bit resolution
14-bit resolution
2- or 4-quadrant multiplying DAC
±1 LSB DNL
±1 LSB INL
Operating supply voltage: 2.7 V to 5.5 V
Low noise: 12 nV/√Hz
Low power: I
DD
= 10 μA
0.5 μs settling time
Built-in R
FB
facilitates current-to-voltage conversion
Built-in 4-quadrant resistors allow 0 V to –10 V, 0 V to +10 V,
or ±10 V outputs
2 mA full-scale current ±20%, with V
REF
= 10 V
Automotive operating temperature: –40°C to +125°C
Compact TSSOP-28 package
R1
R1
R
COM
R2
AD5546/AD5556
FUNCTIONAL BLOCK DIAGRAM
REF R
OFS
R
OFS
R
FB
R
FB
I
OUT
V
DD
AD5546/
AD5556
CONTROL
LOGIC
DAC
16/14
DAC
REGISTER
WR
LDAC
DB0 TO DB15
GND
POR
03810-001
MSB
RS
Figure 1. AD5546/AD5556 Simplified Block Diagram
GENERAL DESCRIPTION
The AD5546/AD5556 are precision 16-/14-bit, multiplying, low
power, current output, parallel input digital-to-analog converters
(DACs). They operate from a single 2.7 V to 5.5 V supply with
±10 V multiplying references for four-quadrant outputs. Built-
in four-quadrant resistors facilitate the resistance matching and
temperature tracking that minimize the number of components
needed for multiquadrant applications. The feedback resistor
(R
FB
) simplifies the I-V conversion with an external buffer. The
AD5546/AD5556 are packaged in compact TSSOP-28 packages
with operating temperatures from –40°C to +125°C.
The
EVAL-AD5546SDZ
is available for evaluating DAC perfor-
mance. For more information, see the
UG-309
evaluation board
user guide.
APPLICATIONS
Automatic test equipment
Instrumentation
Digitally controlled calibration
Digital waveform generation
+
OP2177
+10V
–10V
R1A
R1
+5V
C1
1µF
C2
0.1µF
V
DD
R
COMA
R2
VREFA
R
OFSA
R
OFS
R
FBA
C6
R
FB
C5
0.1µF
V+
U2B
V–
C8
1µF
WR LDAC RS
WR
LDAC
RS
MSB
MSB
C9
0.1µF
–15V
VOUT
+15V
C4
1µF
–
C7
U2A
AD5546/AD5556
16-/14-BIT
DATA
U1
16-/14-BIT
DATA
GND
I
OUT
–
OP2177
+
Figure 2. 16-/14-Bit, Four-Quadrant Multiplying DAC with a Minimum of External Components
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2004-2011 Analog Devices, Inc. All rights reserved.
03810-024
AD5546/AD5556
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics ............................................................. 3
Timing Diagram ........................................................................... 4
Absolute Maximum Ratings ............................................................ 5
ESD Caution .................................................................................. 5
Pin Configurations and Function Descriptions ........................... 6
Typical Performance Characteristics ............................................. 8
Circuit Operation ........................................................................... 10
Digital-to-Analog (DAC) Converter Section ......................... 10
Data Sheet
Digital Section ............................................................................ 11
ESD Protection Circuits ............................................................ 11
Amplifier Selection .................................................................... 11
Reference Selection .................................................................... 11
Applications Information .............................................................. 12
Unipolar Mode ........................................................................... 12
Bipolar Mode .............................................................................. 13
AC Reference Signal Attenuator ............................................... 14
System Calibration ..................................................................... 14
Reference Selection .................................................................... 15
Amplifier Selection .................................................................... 15
Outline Dimensions ....................................................................... 17
Ordering Guide .......................................................................... 17
REVISION HISTORY
11/11—Rev. C to Rev. D
Changes to General Description Section ...................................... 1
Changes to Ordering Guide .......................................................... 18
1/11—Rev. B to Rev. C
Changes to Figure 2 .......................................................................... 1
Changes to Figure 21 ...................................................................... 13
4/10—Rev. A to Rev. B
Changes to Table 1 ............................................................................ 4
Moved Timing Diagram Section and Figure 5 to
Specifications Section....................................................................... 4
Moved Table 5 Through Table 7 to Digital Section Section ....... 7
Replaced Figure 15 and Figure 16 .................................................. 9
Deleted Figure 17 and Figure 18..................................................... 9
Added Reference Selection Section, Amplifier Selection Section,
and Table 11 Through Table 13 .................................................... 15
9/09—Rev. 0 to Rev. A
Changes to Features Section............................................................ 1
Changes to Static Performance, Relative Accuracy,
Grade: AD5546C Parameter, Table 1 ............................................. 3
Changes to Ordering Guide .......................................................... 16
1/04—Revision 0: Initial Version
Rev. D | Page 2 of 20
Data Sheet
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
AD5546/AD5556
V
DD
= 2.7 V to 5.5 V, I
OUT
= virtual GND, GND = 0 V, V
REF
= –10 V to 10 V, T
A
= full operating temperature range, unless otherwise noted.
Table 1.
Parameter
STATIC PERFORMANCE
1
Resolution
Symbol
N
Conditions
AD5546, 1 LSB = V
REF
/2
16
= 153 µV at
V
REF
= 10 V
AD5556, 1 LSB = V
REF
/2
14
= 610 µV at
V
REF
= 10 V
Grade: AD5556C
Grade: AD5546B
Grade: AD5546C
Monotonic
Data = zero scale, T
A
= 25°C
Data = zero scale, T
A
= T
A
maximum
Data = full scale
Data = full scale
Data = full scale
Min
Typ
16
14
±1
±2
±1
±1
10
20
±4
±4
±2.5
Max
Unit
Bits
Bits
LSB
LSB
LSB
LSB
nA
nA
mV
mV
mV
ppm/°C
+18
6
6
±1.5
12
V
kΩ
kΩ
Ω
kΩ
pF
mA
pF
0.8
0.4
2.4
2.1
10
10
V
DD
= 5 V
V
DD
= 3 V
V
DD
= 5 V
V
DD
= 3 V
V
DD
= 5 V
V
DD
= 3 V
V
DD
= 5 V
V
DD
= 3 V
20
35
0
0
20
35
20
35
V
V
V
V
µA
pF
ns
ns
ns
ns
ns
ns
ns
ns
Relative Accuracy
INL
Differential Nonlinearity
Output Leakage Current
Full-Scale Gain Error
Bipolar Mode Gain Error
Bipolar Mode Zero-Scale
Error
Full-Scale Tempco
2
REFERENCE INPUT
V
REF
Range
REF Input Resistance
R1 and R2 Resistance
R1-to-R2 Mismatch
Feedback and Offset
Resistance
Input Capacitance
2
ANALOG OUTPUT
Output Current
Output Capacitance
2
LOGIC INPUT AND OUTPUT
Logic Input Low Voltage
Logic Input High Voltage
Input Leakage Current
Input Capacitance
2
INTERFACE TIMING
2, 3
Data to WR Setup Time
Data to WR Hold Time
WR Pulse Width
LDAC Pulse Width
DNL
I
OUT
G
FSE
G
E
G
ZSE
TCV
FS
V
REF
REF
R1 and R2
∆(R1 to R2)
R
FB
, R
OFS
C
REF
I
OUT
C
OUT
V
IL
V
IH
I
IL
C
IL
t
DS
t
DH
t
WR
t
LDAC
±1
±1
±1
1
–18
4
4
8
5
5
±0.5
10
5
Data = full scale
Code dependent
V
DD
= 5 V
V
DD
= 3 V
V
DD
= 5 V
V
DD
= 3 V
2
200
Rev. D | Page 3 of 20
AD5546/AD5556
Parameter
RS Pulse Width
WR to LDAC Delay Time
SUPPLY CHARACTERISTICS
Power Supply Range
Positive Supply Current
Power Dissipation
Power Supply Sensitivity
AC CHARACTERISTICS
4
Output Voltage Settling
Time
Reference Multiplying BW
DAC Glitch Impulse
Multiplying Feedthrough
Error
Digital Feedthrough
Total Harmonic Distortion
Output Noise Density
1
Data Sheet
Symbol
t
RS
t
LWD
Conditions
V
DD
= 5 V
V
DD
= 3 V
V
DD
= 5 V
V
DD
= 3 V
Min
20
35
0
0
2.7
Logic inputs = 0 V
Logic inputs = 0 V
∆V
DD
= ±5%
To ±0.1% of full scale, data cycles from zero
scale to full scale to zero scale
V
REF
= 100 mV rms, data = full scale, C6 =5.6 pF
5
V
REF
= 0 V, midscale minus 1 to midscale
V
REF
= 100 mV rms, f = 10 kHz
WR = 1, LDAC toggles at 1 MHz
V
REF
= 5 V p-p, data = full-scale, f = 1 kHz
f = 1 kHz, BW = 1 Hz
0.5
6.8
−3
79
7
–103
12
Typ
Max
Unit
ns
ns
ns
ns
V
μA
mW
%/%
μs
MHz
nV-s
dB
nV-s
dB
nV/rt Hz
V
DD RANGE
I
DD
P
DISS
P
SS
t
S
BW
Q
V
OUT
/V
REF
Q
D
THD
e
N
5.5
10
0.055
0.003
All static performance tests (except I
OUT
) are performed in a closed-loop system, using an external precision OP97 I-V converter amplifier. The AD554x RFB terminal is
tied to the amplifier output. The op amp +IN is grounded, and the DAC I
OUT
is tied to the op amp –IN. Typical values represent average readings measured at 25°C.
2
These parameters are guaranteed by design and are not subject to production testing.
3
All input control signals are specified with t
R
= t
F
= 2.5 ns (10% to 90% of 3 V) and timed from a voltage level of 1.5 V.
4
All ac characteristic tests are performed in a closed-loop system using an AD8038 I-V converter amplifier except for THD where an AD8065 was used.
5
C6 is the C6 capacitor shown in Figure 20.
TIMING DIAGRAM
t
WR
WR
DATA
t
DS
LDAC
t
DH
t
LWD
t
LDAC
RS
t
RS
03810-005
Figure 3. AD5546/AD5556 Timing Diagram
Rev. D | Page 4 of 20
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
V
DD
to GND
R
FB
, R
OFS
, R1, R
COM
, and REF to GND
Logic Inputs to GND
V (I
OUT
) to GND
Input Current to Any Pin Except Supplies
Thermal Resistance (θ
JA
)
Maximum Junction Temperature (T
J MAX
)
Operating Temperature Range
Storage Temperature Range
Lead Temperature:
Vapor Phase, 60 s
Infrared, 15 s
Package Power Dissipation
Rating
–0.3 V, +8 V
–18 V, 18 V
–0.3 V, +8 V
–0.3 V, V
DD
+ 0.3 V
±50 mA
128°C
150°C
–40°C to +125°C
–65°C to +150°C
215°C
220°C
(T
J MAX
– T
A
)/θ
JA
AD5546/AD5556
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. D | Page 5 of 20
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