ISL8013
NOT RECOMMENDED FOR NEW DESIGNS
RECOMMENDED REPLACEMENT PART
ISL8013A
DATASHEET
FN6309
Rev 3.00
November 23, 2009
3A Low Quiescent Current 1MHz High Efficiency Synchronous Buck Regulator
The ISL8013 is a high efficiency, monolithic,
synchronous step-down DC/DC converter that can
deliver up to 3A continuous output current from a 2.7V
to 5.5V input supply. It uses a current control
architecture to deliver very low duty cycle operation at
high frequency with fast transient response and
excellent loop stability.
The ISL8013 integrates a pair of low ON-resistance
P-Channel and N-Channel internal MOSFETs to
maximize efficiency and minimize external component
count. The 100% duty-cycle operation allows less than
300mV dropout voltage at 3A output current. High
1MHz pulse-width modulation (PWM) switching
frequency allows the use of small external components
and SYNC input enables multiple ICs to synchronize
out of phase to reduce ripple and eliminate beat
frequencies.
The ISL8013 can be configured for discontinuous or
forced continuous operation at light load. Forced
continuous operation reduces noise and RF
interference while discontinuous mode provides high
efficiency by reducing switching losses at light loads.
Fault protection is provided by internal hiccup mode
current limiting during short circuit and overcurrent
conditions, an output over voltage comparator and
over-temperature monitor circuit. A power good output
voltage monitor indicates when the output is in
regulation.
The ISL8013 is offered in a space saving 4x4 QFN lead
free package with exposed pad lead frames for low
thermal resistance.
The ISL8013 includes a pair of low ON-resistance
P-Channel and N-Channel internal MOSFETs to
maximize efficiency and minimize external component
count. The 100% duty-cycle operation allows less than
300mV dropout voltage at 3A.
The ISL8013 offers a 1ms Power Good (PG) timer at
power-up. When shutdown, ISL8013 discharges the
output capacitor. Other features include internal
soft-start, internal compensation, overcurrent
protection, and thermal shutdown.
The ISL8013 is offered in a 4mmx4mm 16 Ld QFN
package with 1mm maximum height. The complete
converter occupies less than 0.4in
2
area.
Features
• High Efficiency Synchronous Buck Regulator with
up to 97% Efficiency
• Power-Good (PG) Output with a 1ms Delay
• 2.7V to 5.5V Supply Voltage
• 3% Output Accuracy Over-Temperature/Load/Line
• 3A Output Current
• Start-Up with Pre-Biased Output
• Internal Soft-Start - 1ms
• Soft-Stop Output Discharge During Disabled
• 35µA Quiescent Supply Current in PFM Mode
• Selectable Forced PWM Mode and PFM Mode
• External Synchronization up to 4MHz
• Less than 1µA Logic Controlled Shutdown Current
• 100% Maximum Duty Cycle
• Internal Current Mode Compensation
• Peak Current Limiting and Hiccup Mode Short
Circuit Protection
• Over-Temperature Protection
• Small 16 Ld 4mmx4mm QFN
• Pb-Free (RoHS Compliant)
Applications
• DC/DC POL Modules
• µC/µP, FPGA and DSP Power
• Plug-in DC/DC Modules for Routers and Switchers
• Portable Instruments
• Test and Measurement Systems
• Li-ion Battery Powered Devices
• Small Form Factor (SFP) Modules
• Bar Code Readers
FN6309 Rev 3.00
November 23, 2009
Page 1 of 18
ISL8013
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
ISL8013IRZ
NOTES:
1. Add “-T” suffix for tape and reel. Please refer to
TB347
for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both
SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for
ISL8013.
For more information on MSL please see
techbrief
TB363.
PART
MARKING
80 13IRZ
TEMP.
RANGE
(°C)
-40 to +85
PACKAGE
(Pb-Free)
16 Ld 4x4 QFN
PKG.
DWG. #
L16.4x4
Pin Configuration
ISL8013
(16 LD QFN)
TOP VIEW
NC
LX
LX
14
LX
13
12 PGND
11 PGND
10 SGND
9
5
EN
6
NC
7
PG
8
VFB
SGND
16
VIN
VIN
VDD
SYNCH
1
2
3
4
15
Pin Descriptions
PIN NUMBER
1, 2
3
5
PIN NAME
VIN
VDD
EN
DESCRIPTION
Input supply voltage. Connect a 10µF ceramic capacitor to power ground.
Input supply voltage for the analog circuitry. Connect to VIN pin.
Regulator enable pin. Keep the EN voltage low in disabled state until VIN settles or is
above 2.5V. Enable the output when driven to high. Shut down the chip and discharge
output capacitor when driven to low. Do not connect directly to VIN or leave this pin
floating.
1ms timer output. At power-up or EN HI, this output is a 1ms delayed Power-Good signal
for the output voltage.
Mode Selection pin. Connect to logic high or input voltage VDD for PWM mode. Connect
to logic low or ground for PFM mode. Connect to an external function generator for
synchronization with the negative edge trigger. Do not leave this pin floating.
Switching node connection. Connect to one terminal of the inductor.
Power ground
Signal ground.
Buck regulator output feedback. Connect to the output through a resistor divider for
adjustable output voltage. For 0.8V output voltage, connect this pin to the output.
No connect.
The exposed pad must be connected to the SGND pin for proper electrical performance.
Place as much vias as possible under the pad connecting to SGND plane for optimal
thermal performance.
7
4
PG
SYNCH
13, 14, 15
11, 12
9, 10
8
6, 16
-
LX
PGND
SGND
VFB
NC
Exposed Pad
FN6309 Rev 3.00
November 23, 2009
Page 2 of 18
ISL8013
Absolute Maximum Ratings
(
Reference to GND
)
VIN, VDD . . . . . . . . . . . . . . -0.3V to 6V (DC) or 7V (20ms)
EN, SYNCH, PG . . . . . . . . . . . . . . . . . . -0.3V to VIN + 0.3V
LX . . . -1.5V (100ns)/-0.3V (DC) to 6.5V (DC) or 7V (20ms)
VFB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 2.7V
Thermal Information
Thermal Resistance (Typical, Notes 4, 5))
JA
(°C/W)
JC
(°C/W)
16 Ld 4x4 QFN Package . . . . . . .
39
3
Junction Temperature Range . . . . . . . . . . -55°C to +125°C
Storage Temperature Range . . . . . . . . . . . -65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
VIN Supply Voltage Range . . . . . . . . . . . . . . . . 2.7V to 5.5V
Load Current Range . . . . . . . . . . . . . . . . . . . . . . . 0A to 3A
Ambient Temperature Range . . . . . . . . . . . . -40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warranty.
NOTES:
4.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach”
features. See Tech Brief TB379.
5.
JC
, “case temperature” location is at the center of the exposed metal pad on the package underside. See Tech Brief TB379.
Electrical Specifications
Unless otherwise noted, all parameter limits are established over the recommended
operating conditions and the typical specification are measured at the following conditions:
T
A
= -40°C to +85°C, V
IN
= 3.6V, EN = VDD, unless otherwise noted. Typical values are at
T
A
= +25°C.
Boldface limits apply over the operating temperature range, -40°C to
+85°C.
SYMBOL
TEST CONDITIONS
MIN
MAX
(Note 7) TYP (Note 7)
UNITS
PARAMETER
INPUT SUPPLY
V
IN
Undervoltage Lockout Threshold
V
UVLO
Rising, no load
Falling, no load
-
2.2
-
-
-
-
2.5
2.4
35
30
6.5
0.1
2.7
-
-
45
10
2
V
V
µA
µA
mA
µA
Quiescent Supply Current
I
VIN
SYNCH = GND, no load at the output
SYNCH = GND, no load at the output
and no switches switching
SYNCH = VDD, F
S
= 1MHz, no load
at the output
Shut Down Supply Current
OUTPUT REGULATION
Reference Voltage
VFB Bias Current
Line Regulation
Soft-Start Ramp Time Cycle
OVERCURRENT PROTECTION
Current Limit Blanking Time
Overcurrent and Auto Restart
Period
Switch Current Limit
Peak Skip Limit
COMPENSATION
Error Amplifier Trans-Conductance
Trans-Resistance
I
SD
V
IN
= 5.5V, EN = low
V
REF
I
VFB
VFB = 0.75V
V
IN
= V
O
+ 0.5V to 5.5V (minimal
2.7V)
0.790
-
-
-
0.8
0.1
0.2
1
0.810
-
-
-
V
µA
%/V
ms
t
OCON
t
OCOFF
I
LIMIT
I
SKIP
(Note 6)
(Note 6)
-
-
4.0
-
17
4
4.8
1.2
-
-
5.9
-
Clock pulses
SS cycle
A
A
-
RT
0.213
20
0.25
-
0.287
µA/V
FN6309 Rev 3.00
November 23, 2009
Page 5 of 18
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