FPGA - Field Programmable Gate Array FPGA - Stratix II GX 3022 LABs 534 IOs
Parameter Name | Attribute value |
Is it lead-free? | Contains lead |
Is it Rohs certified? | incompatible |
Parts packaging code | BGA |
package instruction | MS-034AAR-1, FBGA-1152 |
Contacts | 1152 |
Reach Compliance Code | compliant |
ECCN code | 3A001.A.7.A |
maximum clock frequency | 717 MHz |
Combined latency of CLB-Max | 4.45 ns |
JESD-30 code | S-PBGA-B1152 |
JESD-609 code | e0 |
length | 35 mm |
Humidity sensitivity level | 3 |
Configurable number of logic blocks | 60440 |
Number of entries | 534 |
Number of logical units | 60440 |
Output times | 534 |
Number of terminals | 1152 |
Maximum operating temperature | 85 °C |
Minimum operating temperature | |
organize | 60440 CLBS |
Package body material | PLASTIC/EPOXY |
encapsulated code | BGA |
Encapsulate equivalent code | BGA1152,34X34,40 |
Package shape | SQUARE |
Package form | GRID ARRAY |
Peak Reflow Temperature (Celsius) | 220 |
power supply | 1.2,1.2/3.3,3.3 V |
Programmable logic type | FIELD PROGRAMMABLE GATE ARRAY |
Certification status | Not Qualified |
Maximum seat height | 3.5 mm |
Maximum supply voltage | 1.25 V |
Minimum supply voltage | 1.15 V |
Nominal supply voltage | 1.2 V |
surface mount | YES |
technology | CMOS |
Temperature level | OTHER |
Terminal surface | TIN LEAD |
Terminal form | BALL |
Terminal pitch | 1 mm |
Terminal location | BOTTOM |
Maximum time at peak reflow temperature | 30 |
width | 35 mm |
Base Number Matches | 1 |