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GN4L3Z-T2-AT

Description
PRE-BIASED \"DIGITAL\" TRANSISTOR,50V V(BR)CEO,100MA I(C),SOT-323
CategoryDiscrete semiconductor    The transistor   
File Size421KB,22 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
Environmental Compliance
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GN4L3Z-T2-AT Overview

PRE-BIASED \"DIGITAL\" TRANSISTOR,50V V(BR)CEO,100MA I(C),SOT-323

GN4L3Z-T2-AT Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerRenesas Electronics Corporation
Reach Compliance Codecompliant
Maximum collector current (IC)0.1 A
Minimum DC current gain (hFE)135
Number of components1
Polarity/channel typePNP
Maximum power dissipation(Abs)0.15 W
surface mountYES
Transistor component materialsSILICON
Base Number Matches1
DATA SHEET
SILICON TRANSISTOR
GN4xxx
RESISTOR BUILT-IN TYPE PNP TRANSISTOR
FEATURES
Compact package
Resistors built-in type
Complementary to GA4xxx
PACKAGE DRAWING (Unit: mm)
0.3
+0.1
−0
Marking
0.15
+0.1
−0.05
3
2.1
±
0.1
ORDERING INFORMATION
PART NUMBER
GN4xxx
PACKAGE
SC-70
1.25
±
0.1
0 to 0.1
2
1
ABSOLUTE MAXIMUM RATINGS (T
A
= 25°C)
Collector to Base Voltage
Collector to Emitter Voltage
<R>
Emitter to Base Voltage
Collector Current (DC)
Collector Current (pulse)
Total Power Dissipation
Junction Temperature
Storage Temperature
<R>
Note 1.
PART NUMBER
GN4A4M
GN4F4M
GN4L4M
GN4L3M
GN4L3N
GN4L3Z
GN4A3Q
GN4A4P
GN4F4N
Note2
0.65
0.65
0.3
0.9
±
0.1
V
CBO
V
CEO
V
EBO
I
C
I
C(pulse)
P
T
T
j
T
stg
−60
−50
Note1
V
V
V
A
A
W
°C
°C
2
R
1
0.3
+0.1
−0
2.0
±
0.2
EQUIVALENT CIRCUIT
3
PIN CONNECTION
1: Emitter
2: Base
3: Collector
−0.1
−0.2
0.15
150
−55
to +150
R
2
1
V
EBO
(V)
−10
−10
−10
−10
−5
−5
−5
−5
−5
MARK
NA1
NB1
NC1
ND1
NE1
NF1
NG1
NH1
NJ1
R
1
(kΩ)
10.0
22.0
47.0
4.7
4.7
4.7
1.0
10.0
22.0
R
2
(kΩ)
10.0
22.0
47.0
4.7
10.0
PART NUMBER
GN4L4L
GN4A4Z
GN4F4Z
GN4L4Z
GN4F3M
GN4F3P
V
EBO
(V)
−15
−5
−5
−5
−10
−5
−5
−15
−25
MARK
NK1
NL1
NM1
NN1
NP1
NQ1
NR1
NS1
NT1
R
1
(kΩ)
47.0
10.0
22.0
47.0
2.2
2.2
2.2
10.0
47.0
R
2
(kΩ)
22.0
2.2
10.0
47.0
4.7
10.0
10.0
47.0
47.0
GN4F3R
GN4A4L
GN4L4K
Note 2.
PW
10 ms, Duty Cycle
50%
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. D16490EJ3V0DS00 (3rd edition)
Date Published December 2005 NS CP(K)
Printed in Japan
2002
The mark <R> shows major revised points.
The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field.
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