Multilayer Ceramic Capacitors MLCC - SMD/SMT 0603 0.22uF 10volts X7R 10%
| Parameter Name | Attribute value |
| Is it Rohs certified? | conform to |
| Maker | Alliance Memory |
| package instruction | TFBGA, |
| Reach Compliance Code | compliant |
| ECCN code | EAR99 |
| Factory Lead Time | 8 weeks |
| access mode | MULTI BANK PAGE BURST |
| Maximum access time | 0.4 ns |
| Other features | AUTO/SELF REFRESH |
| JESD-30 code | R-PBGA-B84 |
| length | 13.5 mm |
| memory density | 2147483648 bit |
| Memory IC Type | DDR DRAM |
| memory width | 16 |
| Humidity sensitivity level | 3 |
| Number of functions | 1 |
| Number of ports | 1 |
| Number of terminals | 84 |
| word count | 134217728 words |
| character code | 128000000 |
| Operating mode | SYNCHRONOUS |
| organize | 128MX16 |
| Package body material | PLASTIC/EPOXY |
| encapsulated code | TFBGA |
| Package shape | RECTANGULAR |
| Package form | GRID ARRAY, THIN PROFILE, FINE PITCH |
| Peak Reflow Temperature (Celsius) | NOT SPECIFIED |
| Maximum seat height | 1.2 mm |
| self refresh | YES |
| Maximum supply voltage (Vsup) | 1.9 V |
| Minimum supply voltage (Vsup) | 1.7 V |
| Nominal supply voltage (Vsup) | 1.8 V |
| surface mount | YES |
| technology | CMOS |
| Terminal form | BALL |
| Terminal pitch | 0.8 mm |
| Terminal location | BOTTOM |
| Maximum time at peak reflow temperature | NOT SPECIFIED |
| AS4C128M16D2-25BCN | AS4C128M16D2-25BINTR | |
|---|---|---|
| Description | Multilayer Ceramic Capacitors MLCC - SMD/SMT 0603 0.22uF 10volts X7R 10% | DRAM 2G 1.8V 400Mhz 128M x 16 DDR2 |
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