PJDLC05C-05
VOLTAGE
5.0 Volts
POWER
400 Watts
0.006(0.15)MIN.
This transient overvoltage suppressor is intended to protect sensitive
equipment against electrostatic discharge events as well to offer a
minimum insertion loss in data transmission lines in communications ports
used in portable consumer, computing and networking applications. This
dual transient voltage suppressor comes in a single SOT-23, offering
board space reduction, where the application requires it.
This device comes with two pairs of high speed switching diodes
connected in series, where both pairs are electrically isolated, offering a
very low capacitance, minimizing the insertion losses in data transmission
lines.
ULTRA LOW CAP
ACITANCE DUAL TRANSIET VOL
TAGE
SUPPRESSOR FOR HIGH SPEEDDATA LINES
0.120(3.04)
0.110(2.80)
0.056(1.40)
0.047(1.20)
0.079(2.00)
0.070(1.80)
0.008(0.20)
0.003(0.08)
FEATURES
• Maximum capacitance @ 0 Vdc Bias of 1.0 pF between terminals 1-3
or terminals 2-3
• IEC61000-4-2 esd 15kV Air, 8kV contact compliance
• Lead free in comply with EU RoHS 2002/95/EC directives.
• Green molding compound as per IEC61249 Std. . (Halogen Free)
0.004(0.10)MAX.
0.044(1.10)
0.035(0.90)
0.020(0.50)
0.013(0.35)
MECHANICAL DATA
• Case: SOT-23, plastic
• Terminals: solderable per MIL-STD-750, Method 2026
• Approx. Weight: 0.0003 ounces, 0.0084 grams
• Marking : DEA
1
3
2
Fig.21
MAXIMUM RATINGS
Parameter
Op e r a ti ng J unc ti o n
S to r a g e Te mp e ra tur e Ra ng e
Symbol
T
J
T
S TG
Value
-55 to +150
-55 to +150
Units
O
C
C
O
ELECTRICAL CHARACTERISTICS
PJDLC05C-05
Parameter
Reverse Stand-Off Voltage
Reverse Breakdown Voltage
Reverse Leakage Current
Junction Capacitance
Peak Pulse Current
Clamping Voltage
Clamping Voltage
Symbol
V
RWM
V
BR
I
R
C
J
I
PP
V
C
V
C
Conditions
-
I
T
=1mA
V
RWM
= 5V,
T = 25
O
C
Between pin1.2 to 3
V
R
=0V,f=1MHz
t
P
=8/20
μsec
t
P
=8/20
μsec
@1A
t
P
=8/20
μsec
@5A
Minimum
-
6
-
-
-
-
-
Typical
-
-
0.8
-
-
-
-
Maximum
5
-
1.2
1.0
17
9.5
12
Units
V
V
μA
pF
A
V
V
February 16,2011-REV.03
PAGE . 1
PJDLC05C-05
18
110
100
90
80
8 x 20 sec Peak Current , Amps
16
14
Percent of Ipp
12
10
8
6
4
2
0
6
8
10
12
14
16
18
20
22
24
70
60
50
40
30
20
10
0
0
Rise time 10-90% - 8m s
50% of Ipp @20
m
s
5
10
15
20
25
30
Clamping Voltage , Volts
Fig 1- Clamping Voltage vs Ipp 8x20 sec
time ,
m
sec
Fig 2- Pulse Waveform
10
0.80
0.70
C ap ac i tan c e C
J
, p F
Peak Pulse Power, kW
0.60
0.50
0.40
0.30
0.20
0.10
0.00
0
2
4
6
1
0.1
0.01
0.1
1
10
100
1000
Pulse Duration,msec
Fig 3- Non
-
Repetitive Peak Pulse Power vs Pulse Time
Reverse Bias Voltage, V
FIG.4- TYPICAL JUNCTION CAPACITANCE UNDER BIAS
Power Derating Curve
February 16,2011-REV.03
PAGE . 2
PJDLC05C-05
MOUNTING PAD LAYOUT
SOT-23
0.035 MIN.
(0.90) MIN.
Unit
：
inch(mm)
0.031 MIN.
(0.80) MIN.
0.043
(1.10)
0.037
(0.95)
0.043
(1.10)
0.106
(2.70)
ORDER INFORMATION
• Packing information
T/R - 12K per 13" plastic Reel
T/R - 3K per 7” plastic Reel
LEGAL STATEMENT
Copyright PanJit International, Inc 2012
The information presented in this document is believed to be accurate and reliable. The specifications and information herein are
subject to change without notice. Pan Jit makes no warranty, representation or guarantee regarding the suitability of its produ cts for
any particular purpose. Pan Jit products are not authorized for use in life support devices or systems. Pan Jit does not convey any
license under its patent rights or rights of others.
February 16,2011-REV.03
0.078
(2.00)
PAGE . 3
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