CJA9452 datasheet, PDF - EEWORLD Datasheet

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CJA9452: DescriptionDrain-source voltage (Vdss): 20V Continuous drain current (Id) (at 25°C): 4A Gate-source threshold voltage: 1.5V @ 250uA Drain-source on-resistance: 38mΩ @ 4A, 10V Maximum power dissipation (Ta =25°C): 500mW Type: N-channel N MOS 20V 4A SOT-89-3L; CategoryDiscrete semiconductor MOS (field effect tube); File Size761KB，5 Pages; ManufacturerJCET; Websitehttp://www.cj-elec.com/; Jiangsu Changdian Technology Co., Ltd. focuses on semiconductor packaging and testing business, providing customers at home and abroad with a full range of solutions such as chip testing, packaging design, packaging testing, etc. The company was successfully listed on the Shanghai Main Board in 2003, becoming the first semiconductor packaging and testing listed company in China. It now has a national enterprise technology center and a postdoctoral research workstation. It is a national key high-tech enterprise, a supporting unit of the National Engineering Laboratory for High-density Integrated Circuits, and the chairman unit of the Integrated Circuit Packaging Technology Innovation Strategic Alliance.

Discrete devices: diodes (switching diodes, Schottky diodes (Schottky rectifiers), voltage regulator diodes, Pin diodes, TVS diodes, rectifier diodes, fast recovery diodes); transistors (Darlington tubes, digital transistors, MOSFETs); thyristors: silicon-controlled rectifiers, triacs; composite tubes: transistors + field-effect tubes, dual transistors, dual digital transistors, digital transistors + transistors, transistors + diodes, field-effect tubes + diodes, dual field-effect tubes. Voltage regulator circuit; energy-saving lamp charger switch tube

Lead frame: TO series (TO); SOD series (SOD); SOT series (TSOT, SOT); FBP series (WBFBP); QFN series (QFNWB, DFNWB, DFNFC, QFNFC); QFP series (LQFP: PQFP: PLCC: TQFP); SIP series (SIP, HSIP, FSIP); SOP series (SOP, HSOP, SSOP, MSOP, HTSOP, TSSOP); DIP series (DIP, FDIP, SDIP); PDFN series; PQFN series; MIS series (MISFC, MISWB)

Nine core technologies: Through Silicon Via (TSV) packaging technology; SiP RF packaging technology; wafer-level 3D rewiring packaging process technology; copper bump interconnection technology; high-density FC-BGA packaging and testing technology (Flip Chip BGA); multi-turn array four-sided pinless packaging and testing technology; package body 3D stacking technology; 50μm or less ultra-thin chip 3D stacking packaging technology; MEMS multi-chip packaging technology; MIS packaging technology (pre-encapsulated interconnection system); BGA packaging technology, etc.

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CJA9452 Overview

Drain-source voltage (Vdss): 20V Continuous drain current (Id) (at 25°C): 4A Gate-source threshold voltage: 1.5V @ 250uA Drain-source on-resistance: 38mΩ @ 4A, 10V Maximum power dissipation (Ta =25°C): 500mW Type: N-channel N MOS 20V 4A SOT-89-3L

CJA9452 Parametric

Parameter Name	Attribute value
Drain-source voltage (Vdss)	20V
Continuous drain current (Id) at 25°C	4A
Gate-source threshold voltage	1.5V @ 250uA
Drain-source on-resistance	38mΩ @ 4A,10V
Maximum power dissipation (Ta=25°C)	500mW
type	N channel

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