AME9003AEJHZ datasheet, PDF - EEWORLD Datasheet

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AME9003AEJHZ: DescriptionInterface Circuit; CategoryAnalog mixed-signal IC Drivers and interfaces; File Size255KB，39 Pages; ManufacturerAnalogMicroElectronics,Inc.(AME); AMT was founded in Taiwan in November 2000 and merged into AMT Microelectronics, Inc., a US company located in Silicon Valley, California, USA. Its stock was officially listed for public trading in March 2004.

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AME9003AEJHZ Overview

Interface Circuit

AME9003AEJHZ Parametric

Parameter Name	Attribute value
Maker	AnalogMicroElectronics,Inc.(AME)
package instruction	,
Reach Compliance Code	compliant

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AME, Inc.

AME9003

inar

lim

Pre

CCFL Backlight Controller

General Description

The AME9003 is AME’ s next generation direct drive

CCFL controller. Like its cousins, the AME9001 and

AME9002, the AME9003 controller provides a cost effi-

cient means to drive single or multiple cold cathode fluo-

rescent lamps (CCFL), driving 3 external MOSFETs that,

in turn, drive a wirewound transformer that is coupled to

the CCFL.

The AME9003, like the AME9002 includes extra cir-

cuitry that allows for a special one second start up pe-

riod wherein the voltage across the CCFL is held at a

higher than normal voltage to allow older tubes (or cold

tubes) a period in which they can” warm up” . During

this one second startup period the driving frequency is

adjusted off of resonance so that the tube voltage can be

controlled. As soon as the CCFL

”

strikes” the special

start up period ends and the circuit operates in its normal

mode. However the AME9003 uses an extra capacitor to

accurately set the start up interval. In addition to that the

AME9003 features a soft start AND soft finish on each

dimming cycle edge in order to minimize any audible

vibrations during the dimming function.

The AME9003 also includes features such as, dimming

control polarity selection, undervoltage lockout and fault

detection. It is designed to work with input voltages from

7V up to 24V. When disabled the circuit goes into a zero

current mode.

Pin Configuration

AME9003

1. VREF

2. CE

3. SSC

4. RDELTA

5. SSC1ST

6. RT2

7. VSS

8. OVPH

9. OVPL

10.FCOMP

11.CSDET

12.BATTFB

13.

14.

15.

16.

17.

18.

19.

20.

21.

22.

23.

24.

OUTC

OUTAPB

OUTA

VBATT

BRPOL

VDD

CT1

COMP

BRIGHT

SSV

PNP

Evaluation Board Available !!

System Block Diagram

Controller

External

Components

CCFL Array

Features

Small 24 pin QSOP package

24 pin PDIP/SOIC also available

Drives multiple tubes

Special 1 second start up mode

Automatically checks for common fault

conditions

7.0V < Vbatt < 24V

Low component count

Low Idd < 3.5mA

<1uA shutdown mode

Battery UV lockout

Brightness polarity select

Soft-start, soft-finish dimming

AME

9003

LIGHT

Resistors

Capacitors

Applications

Notebook computers

LCD/TFT displays

AME, Inc.

AME9003

inar

lim

Pre

CCFL Backlight Controller

Pin Description

Pin #

Pin Name

VREF

Pin Description

Reference. Compensation point for the 3.4V internal voltage reference. Must have

bypass capacitor connected here to VSS.

Chip enable. When low (<0.4V) the chip is put into a low current (~0uA) shutdown

mode.

Blanking interval ramp. During the first cycle this pin sources 1.5uA. The first cycle is

used to define the initial start up period, often on the order of one second. During

subsequent cycles SSC sources 140mA. This is primarily used to provide a "blanking

interval" at the beginning of every dimming cycle to temporarily disable the fault

protection circuitry. The blanking interval is active when V(SSC) < 3.0 volts. (See

application notes.)

A resistor connected from this pin to VDD determines the amount that the voltage at

FCOMP modulates the switching frequency. The frequency is inversely proportional to

the voltage at FCOMP.

A capacitor added between this pin and SSC is used to define the one second initial

start up period. SSC1ST is connected to VSS for the start up period and floats for

subsequent periods.

A resistor from this pin to VSS sets the minimum frequency of the VCO. The voltage at

this pin is 1.5V

Negative supply. Connect to system ground.

Over voltage protection input (HIGH). Indirectly senses the voltage at the secondary of

the transformer through a resistor (or capacitor) divider. During the initial start up

period, if OVPH is > 3.3V, FCOMP is driven towards VSS (increasing the frequency)

and SSV is reset to zero (which decreases the duty cycle). After the initial start up

period is completed the circuit will shut down if OVPH is > 3.3V.

Over voltage protection input (LOW). During the initial start up period if OVPL < 2.5

volts then FCOMP is allowed to ramp up (decreasing the oscillator frequency allowing

the circuit to get closer to resonance). If, during the initial start up period, OVPL > 2.5

volts then FCOMP is held at its original value (not allowed to increase so the

oscillator frequency stays constant). This action is designed to hold the voltage

across the CCFL constant while the CCFL "warms up".

Frequency control point. Initially this pin is at VSS which yields a maximum switching

frequency. Depending on the voltage at OVPL and OVPH the pin FCOMP will normally

ramp upwards lowering the switching frequency towards the circuit's resonant

frequency.

SSC

RDELTA

SSC1ST

RT2

VSS

OVPH

OVPL

FCOMP

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