Internal functional block diagram of NCP5201

Internal functional block diagram of NCP5201

NCP 520】There are two sets of PWM signal generating circuits in the chip . One set outputs two PWM signals with opposite phases from the @ pin and the @ pin, which are respectively added to the gates of the three field effect transistors , so that the two sets of field effect transistors alternately conduct. The battery's power supply voltage is turned into a pulse voltage, and then filtered by L2 and COUT to become a +2.5 V voltage to power the memory. At the same time, the +2.5 V power supply is added to the @ pin of the chip, and there is a second set of PWM signal generating circuits and two field effect transistors inside the chip. These two field effect transistors turn the 2.5 V voltage into a pulse signal, which is output by the ⑥ pin of the chip . After filtering by C14, C15, and C16, it outputs a 1.25 V DC voltage to power the circuit in the memory .