Broadband amplifier

1. Main performance indicators of wide-band amplifiers (1) The passband △f is known by definition △f = fH-fL. Usually the lower limit frequency fL≈O, △f≈fHo, so the expansion of the amplifier passband is to try to increase the upper limit frequency fH numerical value. (2) Intermediate frequency voltage amplification factor KO: It is defined as the ratio of the output voltage UO of the intermediate frequency band to the input voltage Ui. (3) There is a contradiction in the product of gain and bandwidth KO△f, that is, increasing △f will reduce KO, and vice versa. Therefore, the product of the two can more comprehensively measure the quality of the amplifier. The larger the KO△f, the better the performance of the broadband amplifier. (4) Rise time ts: It is defined as the time required for the pulse amplitude to rise from 10% to 90%. The better the high-frequency characteristics of the amplifier, the rise time ts The smaller. (5) Falling time tf: It is defined as the time required for the pulse amplitude to drop from 90% to 10%, (6) Uprush δ: The percentage exceeding the pulse amplitude, (7) Flat-top drop amount △: During the pulse duration , the percentage of top drop, the better the low-frequency characteristics of the amplifier, the smaller the flat-top drop. 2. Methods and circuits for extending the passband. There are usually three methods for extending the passband: (1) Negative feedback method, which introduces negative feedback into the circuit and makes the amount of negative feedback smaller at high frequencies than at low frequencies to compensate for high frequencies. When the output voltage decreases, this method is to compensate for the loss without damaging the low-frequency gain, but its amplitude-frequency characteristics are not flat, causing the output pulse wave to overshoot; (3) Use various grounding circuits The characteristics of the circuit combination are used to expand the passband of the amplifier. The circuit of the extended band is introduced below. 1. Voltage parallel negative feedback circuit. Figure 1 is a voltage parallel negative feedback circuit. This circuit mainly compensates the transistor set-base junction capacitance CC and output capacitance CO. And the current amplification factor β causes the amplifier gain to decrease as the frequency increases, because the capacitive reactance of CO is smaller at low frequencies, which reduces UO. Therefore, the amount of negative feedback is also reduced, so that the high and low frequency amplification factors are basically the same. If the value of RF is equivalent to the capacitive reactance of CC at high frequency, CC can only be used at high frequency. It works at frequency and extends the upper limit frequency. Figure 1 Figure 2 2. Current series negative feedback circuit Figure 2 is a current series negative feedback circuit. This circuit can only compensate for the loss caused by the reduction of β, but cannot compensate for the effect of CO. It is only suitable for situations where the distributed capacitance is small, because the amount of negative feedback depends on ReLe. At low frequencies, β is large, so Ie is also large, and the introduction of negative feedback is also large. At high frequencies, the amount of negative feedback decreases due to the decrease of β↓Ie. is also reduced, thereby compensating for the loss of gain reduction due to β↓. 3. Reactive element compensation circuit. Figure 4 is a reactive element compensation circuit. In the figure, Ce is about several picofarads to dozens of picofarads. At low frequencies, its capacitive reactance is much greater. Reo changes from Re, which introduces a large amount of negative feedback. High Ce capacitive reactance becomes smaller at high frequency, which makes the total feedback impedance of the emitter become smaller, and the corresponding high-frequency negative feedback is weakened. This more effectively compensates for the decrease in β. The optimal compensation condition is: (3-5) ReCe=(0.35/△f. By adjusting the ReCe value, the effects of β↓ and Co can be compensated for at the same time. When CoRe is small, press the maximum ReCe is the best condition. If Co is large, it should be determined by adjustment. 4. Parallel inductance compensation circuit Figure 5 shows the parallel inductance compensation circuit. From an AC point of view, L is connected in parallel with the output load, so it is called parallel inductance compensation. It forms a loop with [Co+CL] and resonates at high frequencies. Since the resonant impedance is large, the effect of β↓ on reducing the input by a large factor is compensated. The inductor L=0.4RL (CL+CO) 5 is usually selected according to the following formula. , Series inductance compensation circuit Figure 5 shows the series inductance compensation circuit. The series connection of L and RL in the figure is called inductor series compensation. L, CC and CL form a resonant circuit, and the compensation effect is not as good as the parallel inductance compensation method. 6. Series and parallel inductance compensation circuit diagram. 6 is the series and parallel inductance compensation circuit. In the figure, C1, C2, and C3 are the transistor collector capacitance and the distributed capacitance at the output end of the circuit respectively. The inductors L1 and L2 can be selected according to the following formula: L1=[(1/2)+(C1/ C2)]L2 L2=[(1/2)+(C3/C2)]L0 LO=RC/2π△f Since L1 and L2 have secondary resonance opportunities, the passband band expands greatly. 7. Capacitance and Inductor hybrid compensation circuit Figure 7 shows a capacitor and inductor hybrid compensation circuit. The circuit consists of two stages, BG1 and BG2. The parallel voltage negative feedback between the collector and base of BG2 is realized by RF and LF, which increases the inductive reactance of LF at high frequencies. The amount of negative feedback is reduced, thus compensating for the decrease in output inductance at high frequencies. The input and output impedances of this circuit are very low, so it can withstand larger capacitive loads, greatly expanding the bandwidth of BG1 and BG2. Compensation to offset the effect of frequency climbing? Since the input impedance of BG2 is small, the AC load of the BG1 collector is reduced, so that the input capacitance of BG1 is also reduced, so the BG1 amplifier stage. The frequency response is better. 8. Common emitter and common collector combination circuit. Figure 8 common emitter and common collector combination circuit. In the figure, BG2 is a common collector circuit. It has the advantages of high input impedance and small input capacitance. It is connected behind the BG1 common emitter circuit. , which can reduce the impact of the input capacitance of the rear stage on the front stage. Compared with the common emitter-common emitter circuit, it has better frequency response characteristics and because the output impedance of the common collector circuit is low, it can withstand heavier loads and the output capacitance is better. The frequency response characteristics have little impact. Since the common-collector circuit itself has better frequency characteristics, the frequency response of the common-emitter-common-collector circuit is basically determined by the common-emitter circuit. This circuit is suitable for the final stage of the amplifier. 9. Common-emitter. Figure 9 of the union base combination circuit shows a common emitter and common base circuit. The input impedance of the BG2 common base circuit in the figure is small, generally in the range of several ohms to more than ten ohms.