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The accuracy of DC-DC power supply is becoming more and more precise with the accuracy of FPGA.

Source: InternetPublisher:elleny Keywords: FPGA power supply Updated: 2020/03/05

In addition to power supply accuracy generally affecting the stability and reliability of the entire system, higher-precision power supplies can also help us reduce system power consumption.

FPGA manufacturers continue to adopt more advanced processes to reduce device power consumption and improve performance. At the same time, FPGA has increasingly stringent requirements for the accuracy of power supply. The voltage must be maintained within very strict tolerances. If the power supply voltage range exceeds the specification requirements , it will affect the reliability of the FPGA and even cause the FPGA to fail.

Both Intel (Altera) FPGA and Xilinx FPGA clearly put forward power supply accuracy requirements in their data sheets, among which the most demanding ones are the power supply for the core and high-speed transceivers. For example, the power supply accuracy of Intel's Cyclone V, Cyclone 10 GX, Arria10, and Stratix 10 is required to be within ±30mV.The accuracy of DC-DC power supply is becoming more and more precise with the accuracy of FPGA.

The power supply requirements (±30mV) on the core and transceiver data sheet of Arria10:

The power supply requirements (±30mV) on the core and transceiver data sheets of Stratix10:

If Stratix10 needs to support 26.6G transceiver, the transceiver power supply accuracy must be within ±20mV:

Xilinx's Artix 7, Kintex7, Virtex 7 and other devices also require power supply accuracy within ±30mV. KU+ and VU+ devices require power supply accuracy within ±22mV.

The power supply requirements (±22mV) on the core and transceiver data sheet of Kintek Ultrascale+:

It can be seen that the power supply accuracy of the new generation FPGA is around ±20-30mv, which is already one of the devices with the most stringent power supply accuracy requirements in single boards.

Since the output accuracy is a theoretical calculation value and does not take into account the interference and errors introduced by the single-board PCB wiring and other external equipment, when actually designing the product, the power supply output accuracy must not only meet the requirements in the data sheet, but also must reserve a certain amount of time. Margin, usually in design, we will reserve 50%-100% margin to ensure long-term reliable operation of the system.

Steady-state DC accuracy of power supply and calculation method

The steady-state DC accuracy of a power supply mainly depends on two factors: voltage regulation accuracy and output voltage ripple. There is a misunderstanding here. Many engineers only judge whether the device meets the requirements by the voltage output accuracy on the DC-DC data sheet. In fact, this is incorrect.

First of all, many DC-DCs require external feedback resistors to determine the final output voltage. The voltage adjustment accuracy on the data sheet refers to the output accuracy of the chip itself, and does not calculate the deviation introduced by the feedback circuit. Secondly, the voltage output accuracy on the device data sheet does not include the output voltage ripple, and the two must be superimposed to obtain the correct DC steady-state accuracy.

The correct power supply steady-state DC accuracy is calculated as follows:

Power supply DC steady-state accuracy = device output accuracy (accuracy at full temperature and full load is required here. Many device manuals only give typical values, so be careful) + ripple + error introduced by the accuracy of the external feedback resistor.

The role of high-precision power supply in reducing FPGA power consumption

Let's take an example. The typical working voltage recommended for an FPGA is 0.85V, the highest working voltage is 0.88V, and the lowest working voltage is 0.82V. Assuming that the actual steady-state DC accuracy of the power supply DC-DC is ±30mV, then the DC-DC must be exactly It works at 0.85V. If the voltage is lower, it will be lower than the FPGA's lower voltage limit requirement.

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