DC/DC converter circuit diagram of primary ZVS and secondary ZVS synchronous rectification controlled by ISL6752

The ISL6752 is a high performance, low pin count ZVS full-bridge PWM controller . Like Intersell's ISL6551, it achieves ZVS operation by driving the upper-side bridge MOSFET at a fixed 50% duty cycle, with the lower-side bridge MOSFET modulated by the resonant switching delay on the following edge. Compared to the more familiar phase-shifted control method, this approach provides equivalent efficiency and improved overcurrent and light-load performance in a simple, low-lead package.

The characteristic of ISL6752 is that in order to realize synchronous rectification control, the PWM complementary output uses an external control voltage. This complementary output and the related PWM output can dynamically lead or lag in phase.

This state-of-the-art BICMOS design feature enables the oscillation frequency to be adjusted up to 2MHz with adjustable soft-start, precise zone time and resonance delay control. In addition, multi-pulse suppression eliminates the pulse skipping problem that may occur with alternating output pulses at low duty cycles.

The DC/DC converter with primary ZVS and secondary ZVS synchronous rectification controlled by ISL6752 is as follows:

DC/DC converter with primary ZVS and secondary ZVS synchronous rectification controlled by ISL6752