Micro switch life test circuit

Micro switch life test circuit

The life test of micro switch is an important link. The author has designed a micro switch life test circuit, which is introduced as follows.

1. Transmission part

As shown in Figure 1, the transmission mechanism consists of a non-directional synchronous motor M, a rotating shaft DZ, a disc Y, cam blocks T1 and T2, and a micro switch SW to be tested. The model of the non-directional synchronous motor is: TDYJ49/5-1, voltage: 220V, frequency: 50Hz, power: 3W, speed: 5r/min.

The rotating shaft DZ of the motor M carries a disc Y with a diameter of 100mm, on which are mounted two cam blocks Tl and T2. As the motor rotates at 5r/min, the disc rotates once every 12 seconds, during which the microswitch to be tested is pressed twice, once every 6 seconds. It takes more than 7 seconds for the cam block to completely leave the microswitch after pressing it.

2. Circuit composition

As shown in FIG. 2 , the life test circuit is composed of an RS trigger circuit, a first monostable circuit, a second monostable circuit, a five-digit digital counter, a micro switch load circuit under test, and a power supply circuit.

IC1-1, IC1-2, R1, R2, C1-C4, and Z1-1, Z1-2 (two pairs of normally open contacts of relay Z1), Z1-1, Z1-2 (two pairs of normally closed contacts of Z1) etc. form RS trigger. IC1-3, IC1-4 form inverting shaping circuit. IC2 and its peripheral components R3, R4, C5, C6, C7 etc. form the first monostable circuit. IC3 and its peripheral components R6, R7, C8, C9, C10 etc. form the second monostable circuit. JD-5 panel type five-digit counter and R8, C11 form the counting display circuit. The micro switch SW under test, load motor 7030 and small AC relay Z1 etc. form the load circuit.

3. Circuit Working Principle

1. After power-on, the R terminal of the RS flip-flop is low level. The S terminal is high level. The RS flip-flop is in the "0" state, IC1's ③ and (11) pins are both low level, and both monostables are in a static state. IC3 (3) pin outputs a low level, and no counting pulse is sent to the JD-5 counter. After the JD-5 is turned on and cleared, it displays all 0s.

2. As shown in Figure 1, when the disk Y rotates counterclockwise driven by the motor shaft DZ, when the cam block T1 presses the micro switch SW to be tested, firstly, the load motor M rotates (that is, the micro switch works with a real load). Secondly, Z1 is attracted, its normally open contacts Z1-1 and Z1-2 are closed, and the normally closed contacts Z1-1 and Z1-2 are disconnected (see Figure 2). At this time, the S end of the RS trigger is low level and the R end is high level. The RS trigger is in the "1" state, and IC1③ and (11) pins output high level. When the cam block T1 leaves SW, the motor M stops running, the relay Z1 releases the RS trigger and returns to the "O" state, and the output of IC1③ and (11) pins is low potential again. That is, when the cam blocks T1 and T2 press the micro switch once respectively, IC1③ and (11) pins output a positive pulse with a width of about 1 second, and its period is 6 seconds.

3. After the positive pulse output from IC1(11) pin is differentiated by R3 and C5, the negative differential pulse triggers the first monostable to enter the temporary stable state (display state), and IC2③ outputs a high level. After a delay of 3 seconds, it returns to the reset state, that is, IC2③ outputs a positive pulse with a width of about 3 seconds.

4. After the positive pulse output from IC2 pin ③ is differentiated by R6 and C8, the negative differential pulse makes the second-stage monostable in the visible state, and IC3 pin ③ outputs a high level and returns to the reset state after a delay of about 10ms, that is, IC3 pin ③ outputs a positive pulse with a width of about 10ms.

5. The positive pulse output from IC3 pin ③ is sent to the CP terminal of JD-5 counter, making JD-5 count once. The waveforms of each point are shown in Figure 3, that is, every time the disk rotates one circle, T1 and T2 press the micro switch under test once, so the counter counts twice. In this way, the displayed value of the JD-5 five-digit counter is the number of times the micro switch under test has been actuated, which also reflects the life status of the micro switch under test.

In order to avoid the influence of jitter pulses, a delay circuit is introduced so that the counter counts only when the system is in a stable state. As shown in Figure 2. First, the positive pulse output from the ICI (11) pin is sent to the JD-5 lock pin ④, so that when the micro switch is pressed down and the motor rotates, the value of the counter is locked and not interfered. Second, when the T1 cam block leaves the micro switch, it is delayed for another 3 seconds, and the counting pulse is sent only when the system is completely in a stable state to avoid interference. The capacitors C1-C4 in Figure 2 are used to absorb the jitter interference pulses (burrs) generated by the cam block at the moment of pressing the micro switch and leaving the micro switch.