Analog IC Process Technology Challenges

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Analog IC Process Technology Challenges

Author: Li Guanhua Analyst

Readings: 611

Citations: 0

Published on: 2006-05-12 13:31

Source: ITRI IEK-ITIS Project

As end products develop towards the three major trends of being light, thin, short, low power consumption and multi-functional integration, the quality requirements for images, sounds, power saving and small size are getting higher and higher. The main driving force of analog process technology lies in achieving the functional integration trend of chips at the design and process ends respectively - this includes the perfect balance of analog performance, cost and Time-to-Market. The system can execute functions (digital and analog) quickly and reliably while meeting society's expectations for smaller, faster, more power-efficient and lower prices.

The quality requirements of analog ICs are nothing more than seven technical evaluation indicators such as speed, precision, power consumption, voltage control capability, current control capability, reliability and stability, as well as manufacturing cost evaluation indicators; and for different applications, the performance of one or more of these indicators is particularly required. In view of the continuous and rapid development of digital technology, how to make analog ICs keep up with the ever-increasing digital performance and competently play their role in the system has become one of the main challenges for analog IC suppliers. In addition to more innovative analog product designs, the advancement of analog process technology will play a greater role in future contributions.
According to the 2004 ITRS (International Technology Roadmap for Semiconductors) Update's technical blueprint for analog ICs, the direction of future analog IC technology development is to continue to overcome the following challenges:
First, the isolation problem when integrating analog and digital circuit blocks. Since fast-running digital circuits often generate strong noise, which in turn interferes with analog signals; in addition to signals, analog functions often need to process power, the voltage may easily reach tens of volts, and the current value is calculated in amperes. Under such high power levels, if there is no good isolation protection, the logic and even analog circuits on the chip may be destroyed if not carefully. At this stage, when analog process technology still cannot effectively provide solutions for the isolation of digital and analog blocks, the above-mentioned signal interference and power isolation problems seem to be solved only through the design end. Relying on the experience of designers, more conservative block layout methods are adopted to reduce possible signal interference or completely isolate components from power functions. These requirements make the chip integration problem more complicated and increase the design time and chip area, directly increasing the required cost.
The second is to continue to reduce the operating voltage of analog circuits. Due to the rise of portable product application requirements such as low voltage, low power consumption and longer battery life, in order to meet the stringent requirements of various consumer electronic products for low power consumption and increased battery life, both digital and analog IC components are moving towards reducing operating voltage to save dynamic energy consumption. Especially in today's digital core voltage has dropped to 1.2 ~ 1V, the voltage requirement of analog ICs of 5V or even 12V has become a bottleneck for the system to further reduce energy consumption, so how to reduce the operating voltage of analog circuits has become one of the development focuses of analog processes. From the trend analysis of component operating voltage in Table 1 ITRS technology blueprint, it is hoped that the operating voltage of analog ICs will be reduced to 2.5-1.8V before 2009, and even further reduced to 1.8-1.2V after 2010; to meet the increasingly stringent power consumption requirements of terminal products.

Table 1, ITRS technology blueprint for component operating voltage

time		2003	2004	2005	2006	2007	2008	2009	2010
Technology Node			hp90			hp65			hp45
Operating voltage (V)	Digital	1.0	1.0	0.95	0.9	0.85	0.8	0.75	0.7
	simulation	3.3-1.8	2.5-1.8	2.5-1.8	2.5-1.8	2.5-1.8	2.5-1.8	2.5-1.8	1.8-1.2

Source: ITRS 2004 Update (2005/01); ITRI IEK-ITIS Project (2006/01)

However, even so, reducing the operating voltage is still a very challenging task for analog ICs. Since noise does not decrease as the voltage decreases, the analog function must maintain the operating voltage at a certain level to provide the voltage level required for clean analog signals. How to maintain a good signal-to-noise ratio while reducing the operating voltage will be a problem that needs to be overcome in the development of process technology.
The last challenge is how to successfully integrate advanced analog functions into digital chips based on CMOS processes to achieve the goal of system-on-chip (SoC). It is undeniable that although the analog process is still dominated by different processes at this stage, the CMOS process is the mainstream process of digital ICs. Whether in terms of technology development progress, wafer fab capacity supply, equipment and material acquisition prices, etc., it has more competitive advantages than other processes. It is indeed the only choice to continue to reduce chip costs in the future. Therefore, in terms of long-term trends, as microprocessors, memory, mixed-signal circuits and RF components move toward the so-called system-on-chip integration, in order to achieve both high integration and low cost, CMOS technology must still be used. Although the use of CMOS processes in the early stages of analog circuits still has considerable concerns about performance and noise, some high-performance, high-frequency analog components currently still use BiCMOS or SiGe BiCMOS processes; but with the rapid development of CMOS processes, related solutions such as SOI (Silicon-On-Insulator), strained silicon (Srained Silicon) and new materials have emerged, making the analog/RF performance of CMOS components more and more perfect. Looking to the future, the special processes (such as BiCMOS) that were originally extended from CMOS are expected to be unified in 2007 and return to the CMOS process itself (see Figure 1 for details), becoming a complete process platform for the future development of SoC (System on a Chip). This trend deserves the attention of our analog IC industry.

Source: ITRS 2004 Update (2005/01); ITRI IEK-ITIS Project (2006/01)
Figure 1. Overview of the Analog/Mixed Signal/RF Component Process Technology Blueprint

Observing the trend of the entire analog IC technology, it can be found that the influence of the CMOS process is gradually increasing; especially for cost- and volume-sensitive consumer electronics, in the future, the mainstream development direction will be to integrate digital and analog components through the CMOS process to further reduce costs and volume; whether the characteristics of the CMOS process can be truly mastered will become one of the advantages of analog IC design companies in future product competition. It is recommended that our companies should pay close attention to this trend, work closely with foundry companies, and build relevant technical capabilities.

Tags: Power Technology Analog Technology

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