Japan's three-dimensional large-scale integrated circuit is expected to break through the limit of circuit integration

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Japan's three-dimensional large-scale integrated circuit is expected to break through the limit of circuit integration [Copy link]

Researchers at Tohoku University in Japan have developed a three-dimensional large-scale integrated circuit made up of 10 stacked semiconductor chips, breaking the previous record of three stacked chips. Experts believe that this technology is expected to enable large-scale integrated circuits to break through the limits of circuit integration.

In the past, large-scale integrated circuits (LSIs) were arranged on a chip plane. As the integration level continues to increase, the power consumption of the chip increases, and the problem of heating gradually emerges. Circuit integration has reached its limit. In recent years, countries around the world have been committed to developing three-dimensional LSIs.

According to the Asahi Shimbun on the 28th, the research team of Professor Koyanagi Mitsumasa of Tohoku University in Japan has improved various technologies for stacking semiconductor chips, including the technology of wiring on the chip, how to adjust the position so that multiple chips can be correctly stacked, and the chip adhesive injection method. Finally, a three-dimensional LSI with a 10-layer structure and a thickness of about 0.3 mm was trial-produced, and it was confirmed that it can play the role of a memory.

Three-dimensional LSI has many advantages. The lines on it are shorter than those on a plane LSI, which can reduce power consumption. At the same time, it can integrate chips of different sizes and functions. [code language="VB.NET"] [/code]