Fixed-point arithmetic operations of TMS320

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Fixed-point arithmetic operations of TMS320 [Copy link]

The numerical representation of fixed-point DSP chips is based on the 2's complement representation. Each 16-bit number is represented by l sign bits, i integer bits, and 15-i decimal places. Therefore: 00000010.10100000 The value represented is: 21+2-1+2-3=2.625 This number can be represented in Q8 format (8 decimal places), and the numerical range it represents is -128 to +l27.996. The decimal precision of a Q8 fixed-point number is 1/256=0.004. Although special cases (such as dynamic range and accuracy requirements) must use a mixed representation. However, it is more common to work with fractional numbers in Q15 format or integers in Q0 format. This is especially true for signal processing algorithms that are mainly multiplication and accumulation, where fractional numbers multiplied by fractional numbers give fractional numbers and integers multiplied by integers give integers. Of course, overflow may occur when multiplying and accumulating, in which case the programmer should understand the physical process in mathematics to pay attention to possible overflow. Let's discuss DSP fixed-point operations for multiplication, addition, and division. The assembly program uses TMS320C25 as an example. 3.1 Fixed-point multiplication The multiplication of two fixed-point numbers can be divided into the following three cases: 1. Decimal multiplication of decimals Example 1.9 Q15*Q15=Q30 0.5*0.5=0.25 0.1000000000000000; Q15 * 0.1000000000000000; Q15 ---------------------------------------------- 00.0100000000000000000000000000000=0.25；Q30 The multiplication of two Q15 decimals results in a Q30 decimal, which has two sign bits. In general, the full-precision number obtained after multiplication does not need to be retained in its entirety, but only 16-bit single-precision numbers need to be retained. Since the high 16 bits after multiplication are less than 15 bits of small data, in order to achieve 15-bit accuracy, the product can be shifted left by one bit. The following is the TMS320C25 program for the above multiplication: LT OP1; OP1=4000H(0.5/Q15) MPY OP2; oP2=4000H(0.5/Ql5) PAC SACH ANS, 1; ANS=2000H(0.25/Q15)