1. Considering power consumption and the current sinking capability of the chip, it should be large enough; the larger the resistance, the smaller the current. 2. Considering sufficient driving current, it should be small enough; the smaller the resistance, the larger the current. 3. For high-speed circuits, a pull-up resistor that is too large may make the edge flat. Considering the above three points, it is usually selected between 1k and 10k. The same is true for pull-down resistors. The selection of pull-up resistors and pull-down resistors should be "set in combination with the characteristics of the switch tube and the input characteristics of the lower circuit, and the following factors should be considered": 1. Balance between driving capability and power consumption. Take the pull-up resistor as an example. Generally speaking, the smaller the pull-up resistor, the stronger the driving ability, but the greater the power consumption. The design should pay attention to the balance between the two. 2. The driving requirements of the lower circuit. Also take the pull-up resistor as an example. When the output is high level, the switch tube is disconnected. The pull-up resistor should be properly selected to provide sufficient current to the lower circuit. 3. High and low level setting. The threshold levels of high and low levels of different circuits will be different. The resistor should be properly set to ensure that the correct level can be output. Take the pull-up resistor as an example. When the output is low level, the switch tube is turned on. The voltage divider value of the pull-up resistor and the switch tube on-resistance should be ensured to be below the zero level threshold. 4. Frequency characteristics. Take the pull-up resistor as an example. The capacitance between the pull-up resistor and the drain-source level of the switch tube and the input capacitance between the lower circuit will form an "RC delay". The larger the resistance, the greater the delay. The setting of the pull-up resistor should take into account the circuit's needs in this regard. The principle of setting the pull-down resistor is the same as that of the pull-up resistor. When the OC gate outputs a high level, it is a high impedance state. Its pull-up current should be provided by the pull-up resistor. Assume that each input port is no more than 100uA, and the output port drive current is about 500uA. The standard working voltage is 5V, and the high and low level thresholds of the input port are 0.8V (lower than this value is a low level); 2V (high level threshold value). When selecting a pull-up resistor: 500uA x 8.4K= 4.2, that is, when it is greater than 8.4K, the output terminal can be pulled down to below 0.8V. This is the minimum resistance value, and it cannot be pulled down if it is smaller. If the output port drive current is large, the resistance value can be reduced to ensure that it can be lower than 0.8V when pulled down. When outputting high level, ignoring the leakage current of the tube, the two input ports need 200uA, 200uA x15K = 3V, that is, the voltage drop of the pull-up resistor is 3V, and the output port can reach 2V. This resistance value is the maximum resistance value, and it will not reach 2V if it is larger. 10K is available. [Maximum voltage drop/maximum current, minimum voltage drop/minimum current] The COMS gate can be referred to the 74HC series. The leakage current of the tube cannot be ignored when designing, and the actual current of the IO port is also different at different levels. The above is just the principle, which can be summarized in one sentence: "When outputting a high level, the input port behind should be fed, and when outputting a low level, the output port should not be fed too much" (otherwise the excess current will be fed to the cascade input port, which will be unreliable if it is higher than the low level threshold value) In addition, the following points should be noted: A. It depends on what device the output port drives. If the device requires a high voltage and the output voltage of the output port is not enough, a pull-up resistor needs to be added. B. If there is a pull-up resistor, its port is at a high level by default. If you want to control it, you must use a low level to control it, such as the collector of the transistor in the three-state gate circuit, or the positive electrode of the diode to control the current of the pull-up resistor to be pulled down to a low level. On the contrary, C. Especially used in interface circuits, in order to obtain a certain level, this method is generally used to ensure the correct circuit state to avoid accidents. For example, in motor control, the upper and lower arms of the inverter bridge cannot be directly connected. If they are all driven by the same microcontroller, the initial state must be set. Prevent direct connection! Try to use current injection when driving. When selecting a resistor, choose the one that is closest to the standard value after calculation! Why does P0 need a pull-up resistor? 1. There is no pull-up resistor inside the P0 port 2. When P0 is in the working state of the I/O port, the upper FET is turned off, so the output pin is floating, so P0 is an open-drain output when used as an output line. 3. Since there is no pull-up resistor inside the chip and the upper FET is turned off, the port level cannot be pulled up when P0 outputs 1. P0 is a bidirectional port, and the other P1, P2, and P3 are quasi-bidirectional ports. The quasi-bidirectional port is because it needs to be "prepared" before reading external data. Why do we need to prepare? When the microcontroller reads the port of the quasi-bidirectional port, it should first assign 1 to the port latch, in order to turn off the FET so that the port will not be clamped at a low level due to the on-chip FET. The pull-up and pull-down are generally 10k!
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