Intel reveals power management technology for next-generation Itanium chips
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Intel will present a paper this week at the IEEE International Solid-State Circuits Conference (ISSCC) in San Francisco that will reveal two power management technologies that Intel will use in its next-generation Itanium processor when it launches later this year. According to Nimish Modi, vice president of Intel's Digital Enterprise Division, in a conference call with reporters, the Itanium chip, code-named "Montecito," will ship in late 2005 with both power management technologies. The processor will have a clock speed of 2GHz and a 24MB cache. The processor will require DBS (demand-based switching) and "Foxton" power management technologies to keep power consumption below 100 watts. The two power management technologies ensure that the processor runs at the fastest speed without exceeding the thermal limit. Foxton and DBS technologies are based on Intel's advanced "SpeedStep" technology. According to Modi, "SpeedStep" technology is used for power management of Intel Pentium M notebook computer chips. In some cases, a well-cooled system can run at full capacity, but consume only 100 watts of power in a 120-watt standard. To maximize performance, Foxton power control technology can divide the power consumption voltage into 32 levels, each level is 12.5 milliwatts, and divide the processor into 64 frequency levels, each frequency level represents 10% of the processor speed. Power management technology adjusts the processor's work at any time according to the workload, which can improve the processor's performance by 10%. Demand-Based Switching (DBS) technology uses the exact opposite technique. In certain situations, a server with underutilized processor performance does not need to run the processor at full speed. In this case, DBS's switching mode can slow down the processor and reduce power consumption from 100 watts to 75 watts, or less, to save power and cooling costs.
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