Linear CCD--TCD1304AP output signal error

ygcyang

Linear CCD--TCD1304AP output signal error [Copy link]

Recently, I used FPGA to drive TCD1304AP, Vdd=Vad=3.3V. The driving waveform is as follows: Yellow: SH waveform, the interval between two pulses is 1ms, which is the exposure time. Red: ICG waveform, the interval between two pulses is 7.4ms, which is the data reading time. Red: ICG, pulse width 10.5us Yellow: M, clock period 500ns Red: SH, pulse width 5us Yellow: M, clock period 500ns Red: SH, rising edge is 500ns after the falling edge of ICG Yellow: ICG The CCD output waveform (directly measure the CCD pin) is as follows: The time that CCD has a data segment is about 5.4ms Expand the waveform at the end of the data segment and measure that the length of each data is 3us, which is 6 clock periods based on the M period of the clock signalQuestion: The output signal data change cycle is 6 clocks, which is inconsistent with the 4 clocks in the data sheet! The number of data is about 5.4ms/3us, which is about 1800, half of the data sheet! If the output signal change cycle is 6 clocks, it outputs 2 data, then the number of data is almost the same, but why are the two data values the same? Did I buy a fake?

电子菜蛋

Recently I also drive TCD1304. The output signal frequency I get is 0.25MHz. The result is that one pixel signal is output in 8 cycles. It is also different from one pixel signal output in 4 cycles. Has your problem been solved? ? Great God

sonic65535

This genuine chip seems to cost around 100 yuan