A soft switching implementation method for boost circuits
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Abstract: A method for implementing soft switching in a boost circuit is proposed, which is synchronous rectification plus inductor current reversal. According to the different conditions for realizing soft switching of two switch tubes, the concepts of strong tube and weak tube are proposed, and a design method that meets the soft switching conditions is given. A synchronous boost converter prototype with 24V input, 40V/2.5A output and switching frequency of 200kHz further verifies the correctness of the above method, and its full load efficiency reaches 96.9% Keywords: boost circuit; soft switching; synchronous rectification 0 Introduction Miniaturization is the goal of current power products. Increasing the switching frequency can reduce the size of components such as inductors and capacitors. However, the bottleneck of increasing the switching frequency is the switching loss of the device, so soft switching technology came into being. Generally, to achieve a relatively ideal soft switching effect, one or more auxiliary switches are required to create soft switching conditions for the main switch, and it is hoped that the auxiliary switch itself can also achieve soft switching. As a basic DC/DC topology, the boost circuit is widely used in various power supply products. Since the boost circuit only contains one switch, many additional active or passive circuits are often required to achieve soft switching, which increases the cost of the converter and reduces the reliability of the converter. The boost circuit has a diode in addition to a switch tube. In the case of lower voltage output, it is desirable to use a MOSFET to replace the diode (synchronous rectification) to obtain higher efficiency. If this synchronous switch can be used as an auxiliary tube of the main switch to create soft switching conditions, and can also achieve soft switching itself, it will be a better solution. This paper proposes a method to achieve soft switching in Boost circuit. This solution is suitable for occasions with low output voltage. 1 Working Principle Figure 1 shows a synchronous boost circuit with two switches. The two switches are turned on in a complementary manner, with a certain dead zone in between to prevent common conduction, as shown in Figure 2. In general, the current on the inductor is in one direction, as shown in the fifth waveform in Figure 2. Considering the junction capacitance and dead time of the switch, one cycle can be divided into five stages, and the equivalent circuits of each stage are shown in Figure 3. The following briefly describes the working principle of the synchronous boost circuit in which the inductor current does not change direction. In this design, S2 can achieve soft switching, 
Figure 1 Synchronous Boost Converter 
Figure 2 Main operating waveforms when the inductor current is not reversed 
(a) Stage[ t 0 , t 1 ] (b) Stage2[ t 1 , t 2 ] 
(c)Stage3[ t 2 , t 3 ] (d) Stage4[ t 3 , t 4 ] 
(e) Stage 5 [ t 4 , t 5 ] Figure 3 Equivalent circuits at each stage when the inductor current is not reversed But S1 can only work in hard switching state. 1) Phase 1〔t 0～t 1〕 In this phase, S 1 is turned on, L is subjected to the input voltage, and the current on L increases linearly. At t 1 , S 1 is turned off and this phase ends. 2) Stage 2〔t 1 ~ t 2〕 After S 1 is turned off, the inductor current charges the junction capacitance of S 1 and discharges the junction capacitance of S 2. The drain-source voltage of S 2 can be approximately considered to decrease linearly until it drops to zero, and this stage ends. 3) Stage 3〔t 2 ~ t 3〕 When the drain-source voltage of S 2 drops to zero, the parasitic diode of S 2 turns on, clamping the drain-source voltage of S 2 at zero voltage state, thus creating conditions for the zero voltage conduction of S 2 . 4) Phase 4〔t 3 ~ t 4〕 The gate of S 2 becomes high level, and S 2 is turned on with zero voltage. The current on inductor L flows through S 2 again . The difference between the output voltage and the input voltage is borne on L , and the current decreases linearly until S 2 is turned off, and this phase ends. 5) Phase 5〔t 4 ~ t 5〕 At this time, the current direction on the inductor L is still positive, so the current can only be transferred to the parasitic diode of S 2 , and cannot discharge the junction capacitance of S 1. Therefore, S 1 is working in a hard switching state. Then S1 is turned on and enters the next cycle. From the above analysis, we can see that S2 achieves soft switching, but S1 does not achieve soft switching. The reason is that after S2 is turned off, the current direction on the inductor is positive, and the junction capacitance of S1 cannot be discharged. However, if L is designed to be small enough so that the inductor current is negative when S2 is turned off, as shown in Figure 4, the junction capacitance of S1 can be discharged and the soft switching of S1 can be achieved. 
Figure 4 Main operating waveforms when the inductor current is reversed In this case, one cycle can be divided into 6 stages, and the equivalent circuit of each stage is shown in Figure 5. The working principle is described as follows. 1) Phase 1〔t 0～t 1〕 In this phase, S 1 is turned on, L is subjected to the input voltage, and the current on L increases linearly in the positive direction, from a negative value to a positive value. At t 1 , S 1 is turned off, and this phase ends. 2) Stage 2〔t 1 ~ t 2〕 After S 1 is turned off, the inductor current is positive, charging the junction capacitance of S 1 and discharging the junction capacitance of S 2. The drain-source voltage of S 2 can be approximately considered to decrease linearly. This stage ends when the drain-source voltage of S 2 drops to zero. 3) Stage 3〔t 2 ~ t 3〕 When the drain-source voltage of S 2 drops to zero, the parasitic diode of S 2 turns on, clamping the drain-source voltage of S 2 at zero voltage state, thus creating conditions for the zero voltage conduction of S 2 . 4) Phase 4〔t 3 ~ t 4〕 The gate of S 2 becomes high level, and S 2 is turned on with zero voltage. The current on the inductor L flows through S 2 again . The difference between the output voltage and the input voltage is borne on L , and the current decreases linearly until it becomes negative, then S 2 is turned off, and this phase ends. 5) Stage 5〔t 4 ~ t 5〕At this time, the current direction of the inductor L is negative, which can discharge the junction capacitance of S 1 and charge the junction capacitance of S 2. The drain-source voltage of S 1 can be approximately considered to decrease linearly. This stage ends when the drain-source voltage of S 1 drops to zero. 6) Stage 6〔t 5 ~ t 6〕 When the drain-source voltage of S 1 drops to zero, the parasitic diode of S 1 turns on, clamping the drain-source voltage of S 1 at a zero voltage state, thus creating conditions for the zero voltage turn-on of S 1 . 
(a)Stage[ t 0 , t 1 ](b)Stage2[ t 1 , t 2 ] 
(c)Stage3[ t 2 , t 3 ](d) Stage4[ t 3 , t 4 ] 
(e)Stage5[ t 4 , t 5 ](f) Stage6[ t 5 , t 6 ] Figure 5 Equivalent circuits at each stage when the inductor current is not reversed Then S1 is turned on under zero voltage condition and enters the next cycle. It can be seen that in this scheme, both switches S1 and S2 can achieve soft switching. 2 Parameter design of soft switch The above method uses synchronous rectification and inductor current reversal to achieve soft switching of the Boost circuit. The difficulty of achieving soft switching of the two switches is different. The peak-to-peak value of the inductor current can be expressed as Δ I =( V in DT )/ L（1） Where: D is the duty cycle; T is the switching period. Therefore, the maximum and minimum values of the current on the inductor can be expressed as I max = Δ I /2 + I o（2） I min = Δ I /2－I o（3） Where: Io is the output current. Substituting equation (1) into equation (2) and equation (3), we can obtain I max =( V in DT )/2 L + I o (4) I min =( V in DT )/2 L - I o (5) From the above principle analysis, we can see that the soft switching condition of S1 is achieved by Imin charging the junction capacitance of S2 and discharging the junction capacitance of S1; while the soft switching condition of S2 is achieved by Imax charging the junction capacitance of S1 and discharging the junction capacitance of S2 . In addition, usually under full load, | Imax | >>| Imin |. Therefore, the difficulty of soft switching of S1 and S2 is also different, and S1 is much more difficult than S2 . Here, S1 is called a weak tube and S2 is called a strong tube. The soft switching limit condition of the strong tube S2 is that the junction capacitance C1 of L and S1 and the junction capacitance C2 of S2 resonate , which can make the voltage on C2 resonate to zero, which can be expressed as formula (6).  C 2 V o 2 +  C 1 V o 2 (<=)  LI max 2 (6) Substituting equation (4) into equation (6), we can obtain  C 2 V o 2 +  C 1 V o 2 (<=)  L (7) In fact, formula (7) is very easy to satisfy, and the dead time cannot be very large. Therefore, it can be approximately considered that the current on the inductor L remains unchanged during the dead time, that is, a constant current source charges the junction capacitance of S2 and discharges the junction capacitance of S1 . The ZVS condition in this case is called the margin condition, and the expression is formula (8). ( C 2 + C 1 ) V o (<=)  t dead2 (8) Where: t dead2 is the dead time before S 2 is turned on. Similarly, the soft switching margin condition of the weak tube S1 is ( C 1 + C 2 ) V o (<=)  t dead1 (9) Where: t dead1 is the dead time before S 1 is turned on. In the design of actual circuits, the soft switching conditions of strong transistors are very easy to achieve, so the key is to design the soft switching conditions of weak transistors. First, determine the maximum dead time that can be tolerated, and then calculate the inductance L according to formula (9) . Because, under the premise of achieving soft switching, L should not be too small, so as to avoid causing an excessively large current effective value on the switch tube, thereby causing excessive conduction loss of the switch. 3 Experimental Results A synchronous Boost converter with inductor current reversal and a switching frequency of 200kHz and a power of 100W further verifies the correctness of the above soft switching implementation method. The specifications and main parameters of the converter are as follows: Input voltage V in 24V Output voltage V o 40V Output current Io 0～2.5A Working frequency f 200kHz Main switches S1 and S2 IRFZ44 Inductor L 4.5μH Figure 6(a), Figure 6(b) and Figure 6(c) are experimental waveforms at full load (2.5A). From Figure 6(a), we can see that the current on the inductor L will reverse in the DT or (1 - D ) T period, which creates the condition for soft switching of S1. From Figure 6(b) and Figure 6(c), we can see that both switches S1 and S2 have achieved ZVS. However, from the falling slope of voltage vds, the ZVS condition of S1 is worse than that of S2 , which is the difference between strong tube and weak tube. Figure 7 shows the conversion efficiency of the converter under different load currents. The highest efficiency reaches 97.1% and the full load efficiency is 96.9%. 
(a) Current of L ( I o =1A) 
(b) v gs and v ds of S 2 ( I o =2.5A) 
(c) v gs and v ds of S 1 ( I o =2.5A) Figure 6 Experimental waveform ( V in =24V) 
Figure 7 Efficiency curves under different load currents 4 Conclusion This article proposes a soft switching implementation strategy for boost circuits: synchronous rectification plus inductor current reversal. In this solution, the two switch tubes are divided into strong tubes and weak tubes according to different soft switching conditions. In the design, the size of the inductor L should be determined according to the critical soft switching conditions of the weak tube. Because soft switching is implemented, the switching frequency can be designed to be relatively high. The inductance can be designed to be very small, and the required inductor volume can also be relatively small (usually an I-type magnetic core can be used). Therefore, this solution is suitable for high power density and low output voltage occasions.
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