Application skills/Atmel microcontroller application skills

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Powerful clock interrupt
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	In program design, setting a good clock interrupt can greatly facilitate and simplify program compilation and improve system efficiency and operability. The following takes the 89C51 system with a 6MHz clock as an example to illustrate the application of clock interrupt.
	Timer initial value and interrupt cycle. The time interval of clock interrupt is generally 20ms (50Hz). If a time base signal of one hundredth of a second is required, 10ms (100Hz) can be used. Here we take 20ms. T0 works in 16-bit timer mode (mode 1). After each machine cycle, T0 automatically adds 1. When it reaches the next machine cycle of 0FFFFh, T0 overflows and generates an interrupt. The hardware sets the corresponding flag bit for software query. That is, after N+1 machine cycles after the interrupt is started, T0 generates an interrupt. Therefore, as long as a number N less than 0FFFFh is stored in T0 first, and then the timer is started, an interrupt will be generated after N+1 machine cycles. This number is the so-called "initial value". If the clock is 6MHz, there are 10,000 machine cycles in 20ms. (10000)10=(2710)16, then 0FFFFh-2710h+1=0D8F0h. Since it takes 7 to 8 machine cycles to respond to interrupts, protect the context, and reload the initial value, the initial value that should be loaded into T0 is 0D8F7h. After each interrupt is entered, the values of A and PSW are first pushed into the stack, and then 0D8F7h is loaded into T0.
	Set a unit, and add 1 for each interrupt. Name a unit in RAM INCPI. In the interrupt processing program, after loading the initial value of T0, use the "INC INCPI" instruction to add 1 to it. Whether it is an interrupt program or a main program, you can read any integer multiple of 20ms between 1 and 256 from INCPI. For example, if the program for sending display to the digital tube needs to refresh the display every 0.5 seconds, you can set a waiting unit W_DISP, use the three statements "MOV A, INCPI/ADD A, #25/MOV W_DISP, A" to make it 25 greater than the current INCPI value, and then check whether W-DISP is equal to the INCPI value in each interrupt. If they are equal, it means that 25 interrupt cycles have passed, execute the display sending program, and let W_DISP add 25 and wait for the next 0.5 seconds. Multiple waiting units can be set in the program to obtain multiple time base signals.
	Read keys and watch in interrupts. Usually, we read the keyboard in the main program, the steps are: scan the keyboard, if a key is pressed, delay for tens of milliseconds to debounce, confirm again that the key is indeed pressed, and then process the work corresponding to the key, and repeat the above steps again after completion. This method has two shortcomings: 1. The key input cannot be latched when processing the corresponding work, and the key may be missed. 2. The CPU cannot do other things during the delay debounce, which is not efficient. Putting the key reading in the clock interrupt can avoid the above shortcomings. The method is: if the same key is read as pressed in two adjacent interrupts, the key is valid (the debounce purpose is achieved), and it is latched into the first-in-first-out (queue) keyboard buffer, waiting for the main program to process. In this way, the main program can still respond to keyboard input while processing the key. The buffer depth can usually be set to 8 levels. If the number of latched keys has reached 8, the new key is ignored, and an alarm is issued to remind the user that the new key will be invalid. If the keyboard buffer queue stagnates for much longer than the maximum time required for the main program to process a key press, it means that the main program has made an error or run away. In this case, you can use an instruction in the interrupt to reset the system, thus fulfilling the purpose of a watchdog.
	Delay in the main program. Since there is a normally open clock interrupt, when a shorter delay with higher precision is required in the main program, the clock interrupt should be temporarily closed. When a longer delay with lower precision is required in the program, the following example can be used to avoid multi-layer nested loop delays.
	Example: Output a 1 second high level pulse from P1.1 port
	MOV A, INCPI INC A CJNE A, INCPI, $; Wait for an interrupt to complete SETB P1.1; Set P1.1 to 1, pulse starts ADD A, #50; 50 20ms is 1 second CJNE A, INCPI, $; Wait for an interrupt to increase INCPI by 50 times CLR P1.1; Set P1.1 to 0, pulse ends
	In summary, we can know that the clock interrupt should be used flexibly during design, and the tasks should be reasonably allocated to the interrupt and the main program. The two should have clear division of labor and simple interface. And we should pay attention to shortening the execution time of the interrupt handler as much as possible, and it should not be longer than 20ms.
	Pulse constant current source with variable frequency and duty cycle controlled by 89C2051
	The load of this constant current source is purely resistive, with a resistance range of 100Ω~1kΩ, and an output constant current of 4mA. The constant current source provides three outputs, and the frequency of each output pulse constant current source is 12 times/min, 6 times/min, and 3 times/min, respectively, and the output pulse width is 300ms.
	The constant current source mainly consists of two parts: a constant current source output circuit and a pulse control signal generating circuit with variable frequency and duty cycle.
	The above pulse control signal can also be obtained by frequency division using TTL or CMOS circuit, but the circuit is more complicated, and the frequency and duty cycle are not easy to change. Using the output port of 89C2051 as the pulse control signal, the frequency and duty cycle of the pulse control signal can be changed through the program.
	The pulse constant current source circuit is shown in the attached figure. For the convenience of explanation, only one constant current source output circuit is drawn here.
	Connector P1 is connected to the 9V battery and P3 is connected to the load.
	The constant current source output circuit is composed of U1, T1, T2, D1 and other peripheral circuits. T1, R3, D1, RW1 and R2 constitute the reference voltage source. According to the design requirements, the reference potential added to the in-phase terminal of the op amp is determined by the output current and the resistance value of the sampling resistor R1. According to the parameters in the figure, when T1 is turned on, RW1 is adjusted to make the reference potential of the in-phase terminal of the op amp 0.4V. Obviously, when T1 is turned off, the reference potential is equal to 0V. When T1 is turned on, if the load current is lower than 4mA, the voltage on the sampling resistor R1 drops, the potential of the inverting input terminal of the op amp drops, the output potential of the op amp rises, and the base potential and collector current (load current) of T2 rise; when the load current is greater than 4mA, the base potential and collector current (load current) of T2 drop, and finally the output current is kept constant. When T1 is turned off, since the reference potential added to the in-phase terminal of the op amp drops to 0V, the output voltage of the op amp drops, T2 is turned off, and no current passes through the load.
	The pulse signal that controls the conduction and cutoff of T1 is output from the P10 port of 89C2051. The software that generates the pulse control signal mainly consists of a loop program and a delay subroutine.
	If you want to expand the output current range, you only need to use a relatively high-power voltage regulator and replace T2 with a high-power composite tube.
	AT89C series MCU encryption mode
	The simple decryption of a microcontroller is to erase the encryption lock bit in the microcontroller. Due to the unreasonable design of the erasing operation timing of the AT89C series microcontroller, it is possible to erase the encryption lock bit before erasing the on-chip program. The timing of the erasing operation of the AT89C series microcontroller is: erase start ----> erase operation hardware initialization (10 microseconds) ----> erase the encryption lock bit (50-200 microseconds) ---> erase the data in the on-chip program memory (10 milliseconds) -----> erase end. If the program is used to monitor the erasing process, once the encryption lock bit is erased, the erasing operation is terminated, and further erasing of the on-chip program memory is stopped. The encrypted microcontroller becomes an unencrypted microcontroller. The on-chip program can be read out through the bus. There are two unbreakable encryption methods for the AT89C series microcontroller.
	1. An encryption method that permanently destroys the encryption bits of the microcontroller, referred to as OTP encryption mode.
	2. A method to permanently destroy the encryption of the microcontroller's data bus, referred to as the burn bus encryption mode.
	AT89C series microcontroller OTP encryption mode principle
	This programming encryption algorithm burns out the encryption lock bit (breaks through the silicon chip inside the chip) without damaging other parts and does not occupy any resources of the microcontroller. After the encryption lock bit is burned out, it no longer has the erase feature. The 89C51/52/55 has 3 encryption bits to further increase the reliability of encryption. Once encrypted in OTP mode, the encryption bit in the microcontroller chip and the data in the program memory cannot be erased again. The 89C51/52/55 microcontroller is like a one-time programming OTP type microcontroller. If the user program length is greater than the capacity of the 89C51 microcontroller chip memory, the OPT mode can also be used for encryption. The specific method is as follows:
	1. Expand a large-capacity program memory as usual, such as 27C512 (64K). 2. Arrange the key program part in the first 4K of the program. 3. Write the entire program into 27C512, and then fill the first 4K of 27C512 with 0. 4. Solidify the first 4K of the program into AT89C51 and encrypt it in OPT mode. 5. Connect the EA pin of the microcontroller to a high level. In this way, the first 4K of the program runs inside the microcontroller, and the last 60K runs outside the chip. Pirates cannot read the first 4K of the program, and it will be useless even if they know the last 60K.
	AT89C series single chip microcomputer bus encryption mode principle
	Because the program code in the microcontroller chip must eventually be read out through the data bus, if one of the lines of the data bus guiding the microcontroller is permanently damaged, the decryptor cannot read the correct code of the program in the chip even if the encryption bit is erased. The data bus of 89C1051/2051 is P1 port. The bus burning mode burns the P1.0 port of 89C2051. The original program code is 02H, 01H, 00H. The read data is 03H, 01H, 00H. The lowest bit is always 1, and the program code read out is obviously wrong. This encryption mode is used to encrypt 89C1051/2051 microcontrollers. The disadvantage is that it occupies the resources of the microcontroller. When designing the microcontroller hardware system, the development and design personnel only need to reserve the export line P1.0 for use, and then use the bus burning mode to encrypt the microcontroller.

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