Digital Acquisition and Detection of Radar Video Signal Based on DSP

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Digital Acquisition and Detection of Radar Video Signal Based on DSP [Copy link]

Digital Acquisition and Detection of Radar Video Signal Based on DSP 2006-05-22 11:33 Source: Single Chip Microcomputer and Embedded System Application Author: Sun Haishan

introduction Faster response speed, higher accuracy, automatic target registration, and the ability for operators to handle multiple batches of targets at the same time are the technical indicators pursued by modern radars. Digital acquisition and detection of radar video signals are prerequisites for achieving such goals. As we all know, the measurement of target position by radar is mainly determined by the delay time of the target echo relative to the transmitted radio wave and the direction of the radar antenna. The propagation speed of radio waves is extremely fast, and the time to propagate 1 nautical mile is only about 12.35μs. The interval between radar radio waves is generally in the order of ms. In this interval, theoretically there will be hundreds or thousands of target echoes at most. In order to digitally acquire and process so many target echo signals in such a short time, fast acquisition devices and high-speed computer processors are essential. DSP (Digital Signal Processor) chip, that is, digital signal processor, is such a microprocessor that is particularly suitable for such real-time signal processing. This paper takes the technical parameters of a certain radar as a reference, uses TMS320VC5402 as the signal processor, AD9223 as the A/D converter, and the dual-port memory chip IDT7203 as the data temporary storage, and introduces a method for digital acquisition and processing of radar echo signals. 1 Main device characteristics TMS320VC54x is a low-power, high-performance digital signal processing chip developed by TI, which is mainly used in wireless communication systems and radar signal processing systems. The TMS320VC5402 chip used in this article is a typical product of this series. The main features of this chip are: fast speed, instruction cycle of 10 ns, computing power of 100 MIPS; powerful addressing capability, maximum addressable external memory 1 M×16 bits, built-in 16 K×16 bits of RAM, 4K×16 bits of ROM; 40-bit arithmetic logic unit (ALU), including 2 independent 40-bit accumulators and 1 40-bit barrel shift register; 1 17-bit×17-bit hardware multiplier and 1 40-bit dedicated adder. The multiplier/adder unit can complete a multiplication and accumulation operation (MA) in one pipeline state cycle. AD9223 is a high-performance, low-noise, single-supply, 12-bit analog-to-digital converter that uses high-speed CMOS processing and a novel 4-stage pipeline structure. It is suitable for data acquisition systems in the fields of navigation, communication, radar, and medical treatment. Its main features are: high speed and high resolution, with a sampling clock frequency of up to 3 Msps and a resolution of 12 bits; single clock input, using a single clock input to control all internal conversion cycles; flexible analog signal input, the true differential input structure allows analog signals to be input in two fractional forms, single-ended or differential; flexible reference voltage, to meet the accuracy and temperature drift requirements of different applications, the reference voltage can be selected internal or external (1 V or 2.5 V); the 4-stage pipeline structure and broadband sample-and-hold amplifier (SHA) enable the device to capture the input sampling signal in each clock cycle, and the data output delay is 3 clock cycles. IDT7203 is a dual-port FIFO 9-bit storage buffer with a storage capacity of 2 KB. The input and output have their own address pointers. For each read or write operation, the corresponding output and input address pointers are automatically incremented by 1. The reset signal can clear both address pointers. It provides data area empty, half-full and full signals to indicate the status of the device. The fastest read and write speed is 12 ns. 2 Working Principle of Secondary Threshold Decision The radar video signal always contains the target signal and the noise signal, that is, x(t)=s(t)+n(t). The fundamental purpose of radar signal processing is to extract the useful target signal s(t) from the received video signal x(t) and filter out the useless clutter or interference signal n(t). When processing radar signals, the probability of the target appearing under certain conditions is not known in advance, and it is also difficult to determine the loss caused by a missed alarm. Therefore, the Neyman-Pearson criterion is often used, that is, under the condition of allowing a certain false alarm probability, the missed alarm probability is minimized. The two-level threshold decision method is an effective and practical radar signal processing method. 2.1 Secondary Threshold Decision Principle According to the optimal detection theory, for non-coherent high-frequency pulse trains, using accumulation after detection (video accumulation) to improve radar detection performance is an optimal solution, and its principle is shown in Figure 1. If this solution is processed by analog circuits, it is relatively complex and difficult to implement; if digital processing is used, the intuitive way is to quantize the video signal of the radar receiver according to distance (time) and amplitude into a digital signal, and then store N repetition cycles. For each repetition cycle, a threshold value (r0) is set for the signal amplitude value of each unit according to the distance unit, which is called the first threshold. The video signal value x(ti) of all distance units quantized in each repetition cycle is compared with the corresponding threshold value roi. If the video signal value exceeds its threshold value, it is considered to be a "possible target" signal; otherwise, it is considered to be no signal. This process is called the first-level threshold decision. The first threshold value (roi) established for each distance unit in each repetition cycle is different, and it is also different for each repetition cycle. Here, the set of first threshold values established for each repetition cycle is called a clutter mean estimation table or a clutter map. For the "possible target" signal, it cannot be confirmed that it is the target signal. Because sometimes there are sudden messy interference signals or random noise signals, the sampling of each scan is unrelated. They may exceed the first threshold value once or twice, but the possibility of exceeding the first threshold value for many consecutive times is very small; and for the target, each adjacent scan should have an echo signal, and the probability of continuously exceeding the first threshold value in N samples is relatively high. Therefore, it is necessary to count the quantized pulses that exceed the respective first threshold values according to the distance unit. If there are more than K quantized pulses that exceed the respective first threshold values in N repetition cycles, it is judged that there is a signal. This process is called the second-level threshold decision (K/N decision), and K/N is called the second threshold value. The working principle is shown in Figure 2

2.2 Establishment of the clutter mean estimation table

The clutter mean estimation table (clutter map) is a table of the average values of the clutter signal of each distance unit established based on the quantized value of the radar video signal of each repetition period. The establishment method is the neighboring unit average estimation method. Specifically, let the video signal on a certain distance unit ti be x(ti), take n reference distance units before and after the ti unit as the center, and calculate the average value of the video signal values of these n reference units

As the average estimate of clutter for this distance unit. Also called the first threshold value roi of this distance unit, the size of the value is determined by the clutter environment of the radar detection area. The smaller the n value, the greater the fluctuation of the average estimate of clutter due to too few reference units, which will increase the probability of false alarm; and when the n value is larger, the average estimate of clutter fluctuates less, that is, the first threshold value is more stable, and a constant false alarm effect can be obtained, but it will increase resource overhead and increase the difficulty of implementation. For meteorological and sea wave clutter, they are usually connected areas, and it is more suitable to use the neighboring unit average estimate method to establish a clutter mean table. Here n is 16. Since 52.5 m is a distance unit, it is equivalent to taking the average estimate of clutter for the distance range of 420 m before and after the detection point.

2.3 Calculation of the second level threshold value K/N

To ensure compliance with the Neyman-Pearson criterion, the selection of the N value should depend on the number of echo pulses of the target during the time when the antenna beam sweeps over the target, which is determined by the radar's operating parameters. For a certain ship radar, some of its operating parameters are: repetition frequency 1 200 Hz, trigger pulse width 0.7 μs, antenna speed 20 r/min, antenna beam width 0.7°, and effective range 40 nautical miles. The value of N is N=0.7×1 200／(20×6)=7. According to experience, the value of K is 1.5√N. Here K=4, that is, K/N=4/7.

3 Hardware Circuit Design

The working principle of the hardware circuit is shown in Figure 3. According to the main technical parameters of the radar, the range resolution of the radar is 150×0.7=105 m. Under the premise of not reducing the performance of the original radar, a sampling frequency of 2.857 142 857 MHz is selected here (equivalent to 52.5 m as a sampling distance unit). The memory collects data at the same rate (approximately one radar video signal value is collected every 52.5 m). In this case, for the maximum range of 40 nautical miles, corresponding to each transmission of the radar, the circuit should collect the quantized value of the video signal of 1 412 distance units (here 1500 distance units are taken). Therefore, the dual-port RAM capacity can be selected as 2 KB. Due to the fast access speed, IDT7203 is selected. For the selection of the number of quantization bits of the signal, that is, the number of bits of A/D conversion, considering the influence of quantization noise, the more bits are taken, the smaller the influence. In order to take into account the processing power of DSP and the conversion speed of A/D conversion devices, 12 bits are used.

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The settings of A/D converter AD9223: use the on-chip 2.5 V as the reference voltage; VINB is connected to the reference voltage value, so that the maximum input value of VINA can be 5 V and the minimum is 0 V; the video signal provided by operational amplifier U3 should meet this requirement.

The trigger pulse of the radar is used as the synchronization signal for the system operation. Starting from the falling edge of the trigger pulse, it provides a sampling synchronization pulse signal of 2.857 142 857 MHz for the A/D converter. The 12-bit precision video signal value generated by the A/D converter is entered into two dual-port RAMs (IDT7203) at the same rate. When the entered data reaches 1504 (because the data output of the A/D converter has a delay of 3 clock cycles for the video input signal, the data of 1504 distance units is collected here), an interrupt signal is generated for the DSP. These signals are generated by the large-scale programmable logic device (Lattice M4A5-128/64) according to the radar trigger pulse, crystal oscillator and the address signal and read/write signal generated by the I/O operation of the DSP. Their timing relationship is shown in Figure 4.

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After the DSP responds to the interrupt signal, it executes the data receiving interrupt service program. This program extracts the data in the dual-port RAM into its own internal memory at a very fast speed. At this time, the DSP runs the filtering and target extraction program, and finally transmits the fully processed data through the serial interface.

The read signal RAMRD of the dual-port RAM is generated by the combined effect of the address signal (OFF00H), WR signal and 10STRB signal generated by the DSP when executing the instruction to read the OFF00H address.

4 Software Design

The main task of the software is to process the digitized video signal. In order to achieve fast processing, the program is written in assembly language to ensure that the data is processed within one repetition cycle. The area where the program runs is arranged in the 1 KB memory of 0000H~03FFH in the RAM of the TMS320VC5402 chip. The data input area is from 0400H to 09FFH, occupying 1.5 KB of memory. The clutter mean estimation table (clutter map) is located from OA00H to OFFFH, occupying 1.5 KB of memory. The output data area (processing result) is located from 1000H to 15FFH, occupying 1.5 KB of memory. The 10.5 KB storage area from 1600H to 3FFFH is evenly divided into 7 data areas as the data accumulation area for 7 repetition cycles. For each storage area that stores the quantized data of the radar video signal, the address of each address unit represents a distance unit, and the data stored therein represents the amplitude quantization value of the video signal at the distance unit. After the program responds to the interrupt, the working process is: data collection → establishment of clutter mean estimation table (clutter map) → first threshold judgment → second threshold judgment → data output. The acquisition of azimuth signals and the output of data after processing are not discussed here.

4.1 Data Collection

Since TMS320VC5402 runs very fast, the single instruction cycle is 10 ns, while the fastest access speed of the dual-port RAM is 12 ns. In order to ensure reliable data reading, the I/0 operation is set to delay 2 execution cycles. After the DSP responds to the external interrupt 0 (INTO), it enters the interrupt service and reads the data in the dual-port RAM into the 1500 cells starting at 0408H of the DSP's built-in memory. When the program is initialized, the 8 cells starting at 0400H are set to 0. This is entirely for the convenience of programming when calculating the noise mean estimation table (noise map). The program is as follows:
GETDATA: STM #0408H, AR6; initial address
RPT#(1500-1); number of repetitions
PORTR OFF00H, *AR6+; read data
RETE; interrupt return

4.2 Establishing the clutter mean estimation table
According to the establishment method of the clutter mean estimation table in 3.2, for each distance unit, take the first 8 and the last 7, a total of 16 as reference units, calculate the average value, and make the clutter mean estimation of the unit. Calculate the clutter mean estimation of a total of 1500 distance units and place it in the storage area of OA00H~OFFFH. In specific implementation, the clutter mean estimation of the first unit must be calculated first, and then the subsequent ones are calculated one by one. The program code is as follows:
STM #O4ooH, AR5; read the first address of the data
STM #OA00H, AR7; the first address of the mean estimation
RPTZ A, (16-1); loop 16 times
ADD*AR5+, A; sum
STL A, -4, *AR7+; divide by 16 and put into the estimation table
STM #0400H, AR6; calculate the remaining 1 499
STM#(1500-2), BRC
RPTB ZBEND-1
SUB*AR6+, A
ADD*AR5+, A
STL A, -4, *AR7+
ZBEND: RET
4.3 The first level threshold judgment
compares the radar video signal value read in with the value of the corresponding distance unit in the clutter mean estimation table one by one in the unit of distance unit: if the value of a certain unit of radar video signal is larger than its corresponding clutter mean estimation, this unit is considered to be the echo signal of "possible target", and it is placed in the corresponding unit in the data accumulation area (starting from 1600H), and also placed in the output data block (starting from 1000H); otherwise, these two units are cleared. AR3 is used as the address pointer of the data accumulation area in the program, and its initial value is 1600H, which is set by the initialization program. The program code is as follows:
STM #0408H, AR7; input data area first address
STM #oA00H, AR6; mean estimation table first address
STM #1000H, AR5; output data area first address
STM#(1500-1), BRC:; total number of distance units
RPTB PJlE-1; repeat
LD*AR6+, A; get noise mean estimation
STM*AR7, T; get input data
ST #0, *AR3; clear the accumulation area first
ST #0, *AR5; clear the output area first
SUB*AR7+, A; compare
STRCD*AR3+, ALT; the data is large, place
STRCD*AR5+, ALT; to the accumulation area and output area
PJlE: LD AR3, B; adjust the accumulation area pointer
ADD #100H, B
AND #OFF00H, B
SUB #4000H, B
BC PJlEND, BLT
SUB #2A00H, B
PJIEND: ADD #4000H, B
STML B, AR3; Adjust the accumulation area pointer and end
RET
4.4 Second level threshold judgment
The second threshold judgment is based on the first threshold judgment, filtering out those isolated and unrelated clutter noise signals that accidentally exceed the first threshold but are in multiple scans, that is, further processing the signals of those "possible targets" to further reduce the false alarm probability of detecting targets. According to the discussion in Section 2.3, the value of the second threshold value (K/N) is 4/7. Since the accumulated data and preliminary output data of 7 scans have been established during the first threshold judgment processing, they are located in the data accumulation area and the data output area respectively. Therefore, in the specific implementation of the program, it is to perform K/N judgment on each distance unit within the range one by one based on the latest accumulated data. If it meets the K/N judgment criteria, the value of the output data area remains unchanged, and if it does not meet the criteria, the value of the data output area where the distance unit is located is cleared. Since the program code is relatively long, it is represented by the flow shown in Figure 5.